1 // SPDX-License-Identifier: GPL-2.0
3 * Sony IMX290 CMOS Image Sensor Driver
5 * Copyright (C) 2019 FRAMOS GmbH.
7 * Copyright (C) 2019 Linaro Ltd.
8 * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
11 #include <linux/clk.h>
12 #include <linux/delay.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/i2c.h>
15 #include <linux/module.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/regmap.h>
18 #include <linux/regulator/consumer.h>
19 #include <media/media-entity.h>
20 #include <media/v4l2-ctrls.h>
21 #include <media/v4l2-device.h>
22 #include <media/v4l2-fwnode.h>
23 #include <media/v4l2-subdev.h>
25 #define IMX290_STANDBY 0x3000
26 #define IMX290_REGHOLD 0x3001
27 #define IMX290_XMSTA 0x3002
28 #define IMX290_FR_FDG_SEL 0x3009
29 #define IMX290_BLKLEVEL_LOW 0x300a
30 #define IMX290_BLKLEVEL_HIGH 0x300b
31 #define IMX290_GAIN 0x3014
32 #define IMX290_HMAX_LOW 0x301c
33 #define IMX290_HMAX_HIGH 0x301d
34 #define IMX290_PGCTRL 0x308c
35 #define IMX290_PHY_LANE_NUM 0x3407
36 #define IMX290_CSI_LANE_MODE 0x3443
38 #define IMX290_PGCTRL_REGEN BIT(0)
39 #define IMX290_PGCTRL_THRU BIT(1)
40 #define IMX290_PGCTRL_MODE(n) ((n) << 4)
42 static const char * const imx290_supply_name
[] = {
48 #define IMX290_NUM_SUPPLIES ARRAY_SIZE(imx290_supply_name)
50 struct imx290_regval
{
61 const struct imx290_regval
*data
;
68 struct regmap
*regmap
;
72 struct v4l2_subdev sd
;
74 struct v4l2_mbus_framefmt current_format
;
75 const struct imx290_mode
*current_mode
;
77 struct regulator_bulk_data supplies
[IMX290_NUM_SUPPLIES
];
78 struct gpio_desc
*rst_gpio
;
80 struct v4l2_ctrl_handler ctrls
;
81 struct v4l2_ctrl
*link_freq
;
82 struct v4l2_ctrl
*pixel_rate
;
87 struct imx290_pixfmt
{
92 static const struct imx290_pixfmt imx290_formats
[] = {
93 { MEDIA_BUS_FMT_SRGGB10_1X10
, 10 },
94 { MEDIA_BUS_FMT_SRGGB12_1X12
, 12 },
97 static const struct regmap_config imx290_regmap_config
= {
100 .cache_type
= REGCACHE_RBTREE
,
103 static const char * const imx290_test_pattern_menu
[] = {
105 "Sequence Pattern 1",
106 "Horizontal Color-bar Chart",
107 "Vertical Color-bar Chart",
108 "Sequence Pattern 2",
109 "Gradation Pattern 1",
110 "Gradation Pattern 2",
111 "000/555h Toggle Pattern",
114 static const struct imx290_regval imx290_global_init_settings
[] = {
174 static const struct imx290_regval imx290_1080p_settings
[] = {
192 /* data rate settings */
212 static const struct imx290_regval imx290_720p_settings
[] = {
230 /* data rate settings */
250 static const struct imx290_regval imx290_10bit_settings
[] = {
262 static const struct imx290_regval imx290_12bit_settings
[] = {
274 /* supported link frequencies */
275 #define FREQ_INDEX_1080P 0
276 #define FREQ_INDEX_720P 1
277 static const s64 imx290_link_freq_2lanes
[] = {
278 [FREQ_INDEX_1080P
] = 445500000,
279 [FREQ_INDEX_720P
] = 297000000,
281 static const s64 imx290_link_freq_4lanes
[] = {
282 [FREQ_INDEX_1080P
] = 222750000,
283 [FREQ_INDEX_720P
] = 148500000,
287 * In this function and in the similar ones below We rely on imx290_probe()
288 * to ensure that nlanes is either 2 or 4.
290 static inline const s64
*imx290_link_freqs_ptr(const struct imx290
*imx290
)
292 if (imx290
->nlanes
== 2)
293 return imx290_link_freq_2lanes
;
295 return imx290_link_freq_4lanes
;
298 static inline int imx290_link_freqs_num(const struct imx290
*imx290
)
300 if (imx290
->nlanes
== 2)
301 return ARRAY_SIZE(imx290_link_freq_2lanes
);
303 return ARRAY_SIZE(imx290_link_freq_4lanes
);
307 static const struct imx290_mode imx290_modes_2lanes
[] = {
312 .link_freq_index
= FREQ_INDEX_1080P
,
313 .data
= imx290_1080p_settings
,
314 .data_size
= ARRAY_SIZE(imx290_1080p_settings
),
320 .link_freq_index
= FREQ_INDEX_720P
,
321 .data
= imx290_720p_settings
,
322 .data_size
= ARRAY_SIZE(imx290_720p_settings
),
326 static const struct imx290_mode imx290_modes_4lanes
[] = {
331 .link_freq_index
= FREQ_INDEX_1080P
,
332 .data
= imx290_1080p_settings
,
333 .data_size
= ARRAY_SIZE(imx290_1080p_settings
),
339 .link_freq_index
= FREQ_INDEX_720P
,
340 .data
= imx290_720p_settings
,
341 .data_size
= ARRAY_SIZE(imx290_720p_settings
),
345 static inline const struct imx290_mode
*imx290_modes_ptr(const struct imx290
*imx290
)
347 if (imx290
->nlanes
== 2)
348 return imx290_modes_2lanes
;
350 return imx290_modes_4lanes
;
353 static inline int imx290_modes_num(const struct imx290
*imx290
)
355 if (imx290
->nlanes
== 2)
356 return ARRAY_SIZE(imx290_modes_2lanes
);
358 return ARRAY_SIZE(imx290_modes_4lanes
);
361 static inline struct imx290
*to_imx290(struct v4l2_subdev
*_sd
)
363 return container_of(_sd
, struct imx290
, sd
);
366 static inline int imx290_read_reg(struct imx290
*imx290
, u16 addr
, u8
*value
)
371 ret
= regmap_read(imx290
->regmap
, addr
, ®val
);
373 dev_err(imx290
->dev
, "I2C read failed for addr: %x\n", addr
);
377 *value
= regval
& 0xff;
382 static int imx290_write_reg(struct imx290
*imx290
, u16 addr
, u8 value
)
386 ret
= regmap_write(imx290
->regmap
, addr
, value
);
388 dev_err(imx290
->dev
, "I2C write failed for addr: %x\n", addr
);
395 static int imx290_set_register_array(struct imx290
*imx290
,
396 const struct imx290_regval
*settings
,
397 unsigned int num_settings
)
402 for (i
= 0; i
< num_settings
; ++i
, ++settings
) {
403 ret
= imx290_write_reg(imx290
, settings
->reg
, settings
->val
);
408 /* Provide 10ms settle time */
409 usleep_range(10000, 11000);
414 static int imx290_write_buffered_reg(struct imx290
*imx290
, u16 address_low
,
415 u8 nr_regs
, u32 value
)
420 ret
= imx290_write_reg(imx290
, IMX290_REGHOLD
, 0x01);
422 dev_err(imx290
->dev
, "Error setting hold register\n");
426 for (i
= 0; i
< nr_regs
; i
++) {
427 ret
= imx290_write_reg(imx290
, address_low
+ i
,
428 (u8
)(value
>> (i
* 8)));
430 dev_err(imx290
->dev
, "Error writing buffered registers\n");
435 ret
= imx290_write_reg(imx290
, IMX290_REGHOLD
, 0x00);
437 dev_err(imx290
->dev
, "Error setting hold register\n");
444 static int imx290_set_gain(struct imx290
*imx290
, u32 value
)
448 ret
= imx290_write_buffered_reg(imx290
, IMX290_GAIN
, 1, value
);
450 dev_err(imx290
->dev
, "Unable to write gain\n");
456 static int imx290_stop_streaming(struct imx290
*imx290
)
460 ret
= imx290_write_reg(imx290
, IMX290_STANDBY
, 0x01);
466 return imx290_write_reg(imx290
, IMX290_XMSTA
, 0x01);
469 static int imx290_set_ctrl(struct v4l2_ctrl
*ctrl
)
471 struct imx290
*imx290
= container_of(ctrl
->handler
,
472 struct imx290
, ctrls
);
475 /* V4L2 controls values will be applied only when power is already up */
476 if (!pm_runtime_get_if_in_use(imx290
->dev
))
481 ret
= imx290_set_gain(imx290
, ctrl
->val
);
483 case V4L2_CID_TEST_PATTERN
:
485 imx290_write_reg(imx290
, IMX290_BLKLEVEL_LOW
, 0x00);
486 imx290_write_reg(imx290
, IMX290_BLKLEVEL_HIGH
, 0x00);
487 usleep_range(10000, 11000);
488 imx290_write_reg(imx290
, IMX290_PGCTRL
,
489 (u8
)(IMX290_PGCTRL_REGEN
|
491 IMX290_PGCTRL_MODE(ctrl
->val
)));
493 imx290_write_reg(imx290
, IMX290_PGCTRL
, 0x00);
494 usleep_range(10000, 11000);
495 if (imx290
->bpp
== 10)
496 imx290_write_reg(imx290
, IMX290_BLKLEVEL_LOW
,
498 else /* 12 bits per pixel */
499 imx290_write_reg(imx290
, IMX290_BLKLEVEL_LOW
,
501 imx290_write_reg(imx290
, IMX290_BLKLEVEL_HIGH
, 0x00);
509 pm_runtime_put(imx290
->dev
);
514 static const struct v4l2_ctrl_ops imx290_ctrl_ops
= {
515 .s_ctrl
= imx290_set_ctrl
,
518 static int imx290_enum_mbus_code(struct v4l2_subdev
*sd
,
519 struct v4l2_subdev_pad_config
*cfg
,
520 struct v4l2_subdev_mbus_code_enum
*code
)
522 if (code
->index
>= ARRAY_SIZE(imx290_formats
))
525 code
->code
= imx290_formats
[code
->index
].code
;
530 static int imx290_enum_frame_size(struct v4l2_subdev
*sd
,
531 struct v4l2_subdev_pad_config
*cfg
,
532 struct v4l2_subdev_frame_size_enum
*fse
)
534 const struct imx290
*imx290
= to_imx290(sd
);
535 const struct imx290_mode
*imx290_modes
= imx290_modes_ptr(imx290
);
537 if ((fse
->code
!= imx290_formats
[0].code
) &&
538 (fse
->code
!= imx290_formats
[1].code
))
541 if (fse
->index
>= imx290_modes_num(imx290
))
544 fse
->min_width
= imx290_modes
[fse
->index
].width
;
545 fse
->max_width
= imx290_modes
[fse
->index
].width
;
546 fse
->min_height
= imx290_modes
[fse
->index
].height
;
547 fse
->max_height
= imx290_modes
[fse
->index
].height
;
552 static int imx290_get_fmt(struct v4l2_subdev
*sd
,
553 struct v4l2_subdev_pad_config
*cfg
,
554 struct v4l2_subdev_format
*fmt
)
556 struct imx290
*imx290
= to_imx290(sd
);
557 struct v4l2_mbus_framefmt
*framefmt
;
559 mutex_lock(&imx290
->lock
);
561 if (fmt
->which
== V4L2_SUBDEV_FORMAT_TRY
)
562 framefmt
= v4l2_subdev_get_try_format(&imx290
->sd
, cfg
,
565 framefmt
= &imx290
->current_format
;
567 fmt
->format
= *framefmt
;
569 mutex_unlock(&imx290
->lock
);
574 static inline u8
imx290_get_link_freq_index(struct imx290
*imx290
)
576 return imx290
->current_mode
->link_freq_index
;
579 static s64
imx290_get_link_freq(struct imx290
*imx290
)
581 u8 index
= imx290_get_link_freq_index(imx290
);
583 return *(imx290_link_freqs_ptr(imx290
) + index
);
586 static u64
imx290_calc_pixel_rate(struct imx290
*imx290
)
588 s64 link_freq
= imx290_get_link_freq(imx290
);
589 u8 nlanes
= imx290
->nlanes
;
592 /* pixel rate = link_freq * 2 * nr_of_lanes / bits_per_sample */
593 pixel_rate
= link_freq
* 2 * nlanes
;
594 do_div(pixel_rate
, imx290
->bpp
);
598 static int imx290_set_fmt(struct v4l2_subdev
*sd
,
599 struct v4l2_subdev_pad_config
*cfg
,
600 struct v4l2_subdev_format
*fmt
)
602 struct imx290
*imx290
= to_imx290(sd
);
603 const struct imx290_mode
*mode
;
604 struct v4l2_mbus_framefmt
*format
;
607 mutex_lock(&imx290
->lock
);
609 mode
= v4l2_find_nearest_size(imx290_modes_ptr(imx290
),
610 imx290_modes_num(imx290
), width
, height
,
611 fmt
->format
.width
, fmt
->format
.height
);
613 fmt
->format
.width
= mode
->width
;
614 fmt
->format
.height
= mode
->height
;
616 for (i
= 0; i
< ARRAY_SIZE(imx290_formats
); i
++)
617 if (imx290_formats
[i
].code
== fmt
->format
.code
)
620 if (i
>= ARRAY_SIZE(imx290_formats
))
623 fmt
->format
.code
= imx290_formats
[i
].code
;
624 fmt
->format
.field
= V4L2_FIELD_NONE
;
626 if (fmt
->which
== V4L2_SUBDEV_FORMAT_TRY
) {
627 format
= v4l2_subdev_get_try_format(sd
, cfg
, fmt
->pad
);
629 format
= &imx290
->current_format
;
630 imx290
->current_mode
= mode
;
631 imx290
->bpp
= imx290_formats
[i
].bpp
;
633 if (imx290
->link_freq
)
634 __v4l2_ctrl_s_ctrl(imx290
->link_freq
,
635 imx290_get_link_freq_index(imx290
));
636 if (imx290
->pixel_rate
)
637 __v4l2_ctrl_s_ctrl_int64(imx290
->pixel_rate
,
638 imx290_calc_pixel_rate(imx290
));
641 *format
= fmt
->format
;
643 mutex_unlock(&imx290
->lock
);
648 static int imx290_entity_init_cfg(struct v4l2_subdev
*subdev
,
649 struct v4l2_subdev_pad_config
*cfg
)
651 struct v4l2_subdev_format fmt
= { 0 };
653 fmt
.which
= cfg
? V4L2_SUBDEV_FORMAT_TRY
: V4L2_SUBDEV_FORMAT_ACTIVE
;
654 fmt
.format
.width
= 1920;
655 fmt
.format
.height
= 1080;
657 imx290_set_fmt(subdev
, cfg
, &fmt
);
662 static int imx290_write_current_format(struct imx290
*imx290
)
666 switch (imx290
->current_format
.code
) {
667 case MEDIA_BUS_FMT_SRGGB10_1X10
:
668 ret
= imx290_set_register_array(imx290
, imx290_10bit_settings
,
670 imx290_10bit_settings
));
672 dev_err(imx290
->dev
, "Could not set format registers\n");
676 case MEDIA_BUS_FMT_SRGGB12_1X12
:
677 ret
= imx290_set_register_array(imx290
, imx290_12bit_settings
,
679 imx290_12bit_settings
));
681 dev_err(imx290
->dev
, "Could not set format registers\n");
686 dev_err(imx290
->dev
, "Unknown pixel format\n");
693 static int imx290_set_hmax(struct imx290
*imx290
, u32 val
)
697 ret
= imx290_write_reg(imx290
, IMX290_HMAX_LOW
, (val
& 0xff));
699 dev_err(imx290
->dev
, "Error setting HMAX register\n");
703 ret
= imx290_write_reg(imx290
, IMX290_HMAX_HIGH
, ((val
>> 8) & 0xff));
705 dev_err(imx290
->dev
, "Error setting HMAX register\n");
712 /* Start streaming */
713 static int imx290_start_streaming(struct imx290
*imx290
)
717 /* Set init register settings */
718 ret
= imx290_set_register_array(imx290
, imx290_global_init_settings
,
720 imx290_global_init_settings
));
722 dev_err(imx290
->dev
, "Could not set init registers\n");
726 /* Apply the register values related to current frame format */
727 ret
= imx290_write_current_format(imx290
);
729 dev_err(imx290
->dev
, "Could not set frame format\n");
733 /* Apply default values of current mode */
734 ret
= imx290_set_register_array(imx290
, imx290
->current_mode
->data
,
735 imx290
->current_mode
->data_size
);
737 dev_err(imx290
->dev
, "Could not set current mode\n");
740 ret
= imx290_set_hmax(imx290
, imx290
->current_mode
->hmax
);
744 /* Apply customized values from user */
745 ret
= v4l2_ctrl_handler_setup(imx290
->sd
.ctrl_handler
);
747 dev_err(imx290
->dev
, "Could not sync v4l2 controls\n");
751 ret
= imx290_write_reg(imx290
, IMX290_STANDBY
, 0x00);
757 /* Start streaming */
758 return imx290_write_reg(imx290
, IMX290_XMSTA
, 0x00);
761 static int imx290_set_stream(struct v4l2_subdev
*sd
, int enable
)
763 struct imx290
*imx290
= to_imx290(sd
);
767 ret
= pm_runtime_get_sync(imx290
->dev
);
769 pm_runtime_put_noidle(imx290
->dev
);
770 goto unlock_and_return
;
773 ret
= imx290_start_streaming(imx290
);
775 dev_err(imx290
->dev
, "Start stream failed\n");
776 pm_runtime_put(imx290
->dev
);
777 goto unlock_and_return
;
780 imx290_stop_streaming(imx290
);
781 pm_runtime_put(imx290
->dev
);
789 static int imx290_get_regulators(struct device
*dev
, struct imx290
*imx290
)
793 for (i
= 0; i
< IMX290_NUM_SUPPLIES
; i
++)
794 imx290
->supplies
[i
].supply
= imx290_supply_name
[i
];
796 return devm_regulator_bulk_get(dev
, IMX290_NUM_SUPPLIES
,
800 static int imx290_set_data_lanes(struct imx290
*imx290
)
802 int ret
= 0, laneval
, frsel
;
804 switch (imx290
->nlanes
) {
815 * We should never hit this since the data lane count is
816 * validated in probe itself
818 dev_err(imx290
->dev
, "Lane configuration not supported\n");
823 ret
= imx290_write_reg(imx290
, IMX290_PHY_LANE_NUM
, laneval
);
825 dev_err(imx290
->dev
, "Error setting Physical Lane number register\n");
829 ret
= imx290_write_reg(imx290
, IMX290_CSI_LANE_MODE
, laneval
);
831 dev_err(imx290
->dev
, "Error setting CSI Lane mode register\n");
835 ret
= imx290_write_reg(imx290
, IMX290_FR_FDG_SEL
, frsel
);
837 dev_err(imx290
->dev
, "Error setting FR/FDG SEL register\n");
843 static int imx290_power_on(struct device
*dev
)
845 struct v4l2_subdev
*sd
= dev_get_drvdata(dev
);
846 struct imx290
*imx290
= to_imx290(sd
);
849 ret
= clk_prepare_enable(imx290
->xclk
);
851 dev_err(dev
, "Failed to enable clock\n");
855 ret
= regulator_bulk_enable(IMX290_NUM_SUPPLIES
, imx290
->supplies
);
857 dev_err(dev
, "Failed to enable regulators\n");
858 clk_disable_unprepare(imx290
->xclk
);
863 gpiod_set_value_cansleep(imx290
->rst_gpio
, 0);
864 usleep_range(30000, 31000);
866 /* Set data lane count */
867 imx290_set_data_lanes(imx290
);
872 static int imx290_power_off(struct device
*dev
)
874 struct v4l2_subdev
*sd
= dev_get_drvdata(dev
);
875 struct imx290
*imx290
= to_imx290(sd
);
877 clk_disable_unprepare(imx290
->xclk
);
878 gpiod_set_value_cansleep(imx290
->rst_gpio
, 1);
879 regulator_bulk_disable(IMX290_NUM_SUPPLIES
, imx290
->supplies
);
884 static const struct dev_pm_ops imx290_pm_ops
= {
885 SET_RUNTIME_PM_OPS(imx290_power_off
, imx290_power_on
, NULL
)
888 static const struct v4l2_subdev_video_ops imx290_video_ops
= {
889 .s_stream
= imx290_set_stream
,
892 static const struct v4l2_subdev_pad_ops imx290_pad_ops
= {
893 .init_cfg
= imx290_entity_init_cfg
,
894 .enum_mbus_code
= imx290_enum_mbus_code
,
895 .enum_frame_size
= imx290_enum_frame_size
,
896 .get_fmt
= imx290_get_fmt
,
897 .set_fmt
= imx290_set_fmt
,
900 static const struct v4l2_subdev_ops imx290_subdev_ops
= {
901 .video
= &imx290_video_ops
,
902 .pad
= &imx290_pad_ops
,
905 static const struct media_entity_operations imx290_subdev_entity_ops
= {
906 .link_validate
= v4l2_subdev_link_validate
,
910 * Returns 0 if all link frequencies used by the driver for the given number
911 * of MIPI data lanes are mentioned in the device tree, or the value of the
912 * first missing frequency otherwise.
914 static s64
imx290_check_link_freqs(const struct imx290
*imx290
,
915 const struct v4l2_fwnode_endpoint
*ep
)
918 const s64
*freqs
= imx290_link_freqs_ptr(imx290
);
919 int freqs_count
= imx290_link_freqs_num(imx290
);
921 for (i
= 0; i
< freqs_count
; i
++) {
922 for (j
= 0; j
< ep
->nr_of_link_frequencies
; j
++)
923 if (freqs
[i
] == ep
->link_frequencies
[j
])
925 if (j
== ep
->nr_of_link_frequencies
)
931 static int imx290_probe(struct i2c_client
*client
)
933 struct device
*dev
= &client
->dev
;
934 struct fwnode_handle
*endpoint
;
935 /* Only CSI2 is supported for now: */
936 struct v4l2_fwnode_endpoint ep
= {
937 .bus_type
= V4L2_MBUS_CSI2_DPHY
939 struct imx290
*imx290
;
944 imx290
= devm_kzalloc(dev
, sizeof(*imx290
), GFP_KERNEL
);
949 imx290
->regmap
= devm_regmap_init_i2c(client
, &imx290_regmap_config
);
950 if (IS_ERR(imx290
->regmap
)) {
951 dev_err(dev
, "Unable to initialize I2C\n");
955 endpoint
= fwnode_graph_get_next_endpoint(dev_fwnode(dev
), NULL
);
957 dev_err(dev
, "Endpoint node not found\n");
961 ret
= v4l2_fwnode_endpoint_alloc_parse(endpoint
, &ep
);
962 fwnode_handle_put(endpoint
);
964 dev_err(dev
, "Unsupported bus type, should be CSI2\n");
967 dev_err(dev
, "Parsing endpoint node failed\n");
971 /* Get number of data lanes */
972 imx290
->nlanes
= ep
.bus
.mipi_csi2
.num_data_lanes
;
973 if (imx290
->nlanes
!= 2 && imx290
->nlanes
!= 4) {
974 dev_err(dev
, "Invalid data lanes: %d\n", imx290
->nlanes
);
979 dev_dbg(dev
, "Using %u data lanes\n", imx290
->nlanes
);
981 if (!ep
.nr_of_link_frequencies
) {
982 dev_err(dev
, "link-frequency property not found in DT\n");
987 /* Check that link frequences for all the modes are in device tree */
988 fq
= imx290_check_link_freqs(imx290
, &ep
);
990 dev_err(dev
, "Link frequency of %lld is not supported\n", fq
);
995 /* get system clock (xclk) */
996 imx290
->xclk
= devm_clk_get(dev
, "xclk");
997 if (IS_ERR(imx290
->xclk
)) {
998 dev_err(dev
, "Could not get xclk");
999 ret
= PTR_ERR(imx290
->xclk
);
1003 ret
= fwnode_property_read_u32(dev_fwnode(dev
), "clock-frequency",
1006 dev_err(dev
, "Could not get xclk frequency\n");
1010 /* external clock must be 37.125 MHz */
1011 if (xclk_freq
!= 37125000) {
1012 dev_err(dev
, "External clock frequency %u is not supported\n",
1018 ret
= clk_set_rate(imx290
->xclk
, xclk_freq
);
1020 dev_err(dev
, "Could not set xclk frequency\n");
1024 ret
= imx290_get_regulators(dev
, imx290
);
1026 dev_err(dev
, "Cannot get regulators\n");
1030 imx290
->rst_gpio
= devm_gpiod_get_optional(dev
, "reset",
1032 if (IS_ERR(imx290
->rst_gpio
)) {
1033 dev_err(dev
, "Cannot get reset gpio\n");
1034 ret
= PTR_ERR(imx290
->rst_gpio
);
1038 mutex_init(&imx290
->lock
);
1041 * Initialize the frame format. In particular, imx290->current_mode
1042 * and imx290->bpp are set to defaults: imx290_calc_pixel_rate() call
1043 * below relies on these fields.
1045 imx290_entity_init_cfg(&imx290
->sd
, NULL
);
1047 v4l2_ctrl_handler_init(&imx290
->ctrls
, 4);
1049 v4l2_ctrl_new_std(&imx290
->ctrls
, &imx290_ctrl_ops
,
1050 V4L2_CID_GAIN
, 0, 72, 1, 0);
1053 v4l2_ctrl_new_int_menu(&imx290
->ctrls
, &imx290_ctrl_ops
,
1055 imx290_link_freqs_num(imx290
) - 1, 0,
1056 imx290_link_freqs_ptr(imx290
));
1057 if (imx290
->link_freq
)
1058 imx290
->link_freq
->flags
|= V4L2_CTRL_FLAG_READ_ONLY
;
1060 imx290
->pixel_rate
= v4l2_ctrl_new_std(&imx290
->ctrls
, &imx290_ctrl_ops
,
1061 V4L2_CID_PIXEL_RATE
,
1063 imx290_calc_pixel_rate(imx290
));
1065 v4l2_ctrl_new_std_menu_items(&imx290
->ctrls
, &imx290_ctrl_ops
,
1066 V4L2_CID_TEST_PATTERN
,
1067 ARRAY_SIZE(imx290_test_pattern_menu
) - 1,
1068 0, 0, imx290_test_pattern_menu
);
1070 imx290
->sd
.ctrl_handler
= &imx290
->ctrls
;
1072 if (imx290
->ctrls
.error
) {
1073 dev_err(dev
, "Control initialization error %d\n",
1074 imx290
->ctrls
.error
);
1075 ret
= imx290
->ctrls
.error
;
1079 v4l2_i2c_subdev_init(&imx290
->sd
, client
, &imx290_subdev_ops
);
1080 imx290
->sd
.flags
|= V4L2_SUBDEV_FL_HAS_DEVNODE
;
1081 imx290
->sd
.dev
= &client
->dev
;
1082 imx290
->sd
.entity
.ops
= &imx290_subdev_entity_ops
;
1083 imx290
->sd
.entity
.function
= MEDIA_ENT_F_CAM_SENSOR
;
1085 imx290
->pad
.flags
= MEDIA_PAD_FL_SOURCE
;
1086 ret
= media_entity_pads_init(&imx290
->sd
.entity
, 1, &imx290
->pad
);
1088 dev_err(dev
, "Could not register media entity\n");
1092 ret
= v4l2_async_register_subdev(&imx290
->sd
);
1094 dev_err(dev
, "Could not register v4l2 device\n");
1098 /* Power on the device to match runtime PM state below */
1099 ret
= imx290_power_on(dev
);
1101 dev_err(dev
, "Could not power on the device\n");
1105 pm_runtime_set_active(dev
);
1106 pm_runtime_enable(dev
);
1107 pm_runtime_idle(dev
);
1109 v4l2_fwnode_endpoint_free(&ep
);
1114 media_entity_cleanup(&imx290
->sd
.entity
);
1116 v4l2_ctrl_handler_free(&imx290
->ctrls
);
1117 mutex_destroy(&imx290
->lock
);
1119 v4l2_fwnode_endpoint_free(&ep
);
1124 static int imx290_remove(struct i2c_client
*client
)
1126 struct v4l2_subdev
*sd
= i2c_get_clientdata(client
);
1127 struct imx290
*imx290
= to_imx290(sd
);
1129 v4l2_async_unregister_subdev(sd
);
1130 media_entity_cleanup(&sd
->entity
);
1131 v4l2_ctrl_handler_free(sd
->ctrl_handler
);
1133 mutex_destroy(&imx290
->lock
);
1135 pm_runtime_disable(imx290
->dev
);
1136 if (!pm_runtime_status_suspended(imx290
->dev
))
1137 imx290_power_off(imx290
->dev
);
1138 pm_runtime_set_suspended(imx290
->dev
);
1143 static const struct of_device_id imx290_of_match
[] = {
1144 { .compatible
= "sony,imx290" },
1147 MODULE_DEVICE_TABLE(of
, imx290_of_match
);
1149 static struct i2c_driver imx290_i2c_driver
= {
1150 .probe_new
= imx290_probe
,
1151 .remove
= imx290_remove
,
1154 .pm
= &imx290_pm_ops
,
1155 .of_match_table
= of_match_ptr(imx290_of_match
),
1159 module_i2c_driver(imx290_i2c_driver
);
1161 MODULE_DESCRIPTION("Sony IMX290 CMOS Image Sensor Driver");
1162 MODULE_AUTHOR("FRAMOS GmbH");
1163 MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
1164 MODULE_LICENSE("GPL v2");