drivers/gpu/drm/imx/imx-ldb.c

   1 /*
   2  * i.MX drm driver - LVDS display bridge
   3  *
   4  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <linux/module.h>
  17 #include <linux/clk.h>
  18 #include <linux/component.h>
  19 #include <drm/drmP.h>
  20 #include <drm/drm_fb_helper.h>
  21 #include <drm/drm_crtc_helper.h>
  22 #include <drm/drm_panel.h>
  23 #include <linux/mfd/syscon.h>
  24 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  25 #include <linux/of_device.h>
  26 #include <linux/of_graph.h>
  27 #include <video/of_videomode.h>
  28 #include <linux/regmap.h>
  29 #include <linux/videodev2.h>
  30
  31 #include "imx-drm.h"
  32
  33 #define DRIVER_NAME "imx-ldb"
  34
  35 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  36 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  37 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  38 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  39 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  40 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  41 #define LDB_SPLIT_MODE_EN               (1 << 4)
  42 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  43 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  44 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  45 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  46 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  47 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  48 #define LDB_BGREF_RMODE_INT             (1 << 15)
  49
  50 #define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
  51 #define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)
  52
  53 struct imx_ldb;
  54
  55 struct imx_ldb_channel {
  56         struct imx_ldb *ldb;
  57         struct drm_connector connector;
  58         struct drm_encoder encoder;
  59         struct drm_panel *panel;
  60         struct device_node *child;
  61         int chno;
  62         void *edid;
  63         int edid_len;
  64         struct drm_display_mode mode;
  65         int mode_valid;
  66         int bus_format;
  67 };
  68
  69 struct bus_mux {
  70         int reg;
  71         int shift;
  72         int mask;
  73 };
  74
  75 struct imx_ldb {
  76         struct regmap *regmap;
  77         struct device *dev;
  78         struct imx_ldb_channel channel[2];
  79         struct clk *clk[2]; /* our own clock */
  80         struct clk *clk_sel[4]; /* parent of display clock */
  81         struct clk *clk_parent[4]; /* original parent of clk_sel */
  82         struct clk *clk_pll[2]; /* upstream clock we can adjust */
  83         u32 ldb_ctrl;
  84         const struct bus_mux *lvds_mux;
  85 };
  86
  87 static enum drm_connector_status imx_ldb_connector_detect(
  88                 struct drm_connector *connector, bool force)
  89 {
  90         return connector_status_connected;
  91 }
  92
  93 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
  94 {
  95         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
  96         int num_modes = 0;
  97
  98         if (imx_ldb_ch->panel && imx_ldb_ch->panel->funcs &&
  99             imx_ldb_ch->panel->funcs->get_modes) {
 100                 struct drm_display_info *di = &connector->display_info;
 101
 102                 num_modes = imx_ldb_ch->panel->funcs->get_modes(imx_ldb_ch->panel);
 103                 if (!imx_ldb_ch->bus_format && di->num_bus_formats)
 104                         imx_ldb_ch->bus_format = di->bus_formats[0];
 105                 if (num_modes > 0)
 106                         return num_modes;
 107         }
 108
 109         if (imx_ldb_ch->edid) {
 110                 drm_mode_connector_update_edid_property(connector,
 111                                                         imx_ldb_ch->edid);
 112                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 113         }
 114
 115         if (imx_ldb_ch->mode_valid) {
 116                 struct drm_display_mode *mode;
 117
 118                 mode = drm_mode_create(connector->dev);
 119                 if (!mode)
 120                         return -EINVAL;
 121                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 122                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 123                 drm_mode_probed_add(connector, mode);
 124                 num_modes++;
 125         }
 126
 127         return num_modes;
 128 }
 129
 130 static struct drm_encoder *imx_ldb_connector_best_encoder(
 131                 struct drm_connector *connector)
 132 {
 133         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 134
 135         return &imx_ldb_ch->encoder;
 136 }
 137
 138 static void imx_ldb_encoder_dpms(struct drm_encoder *encoder, int mode)
 139 {
 140 }
 141
 142 static bool imx_ldb_encoder_mode_fixup(struct drm_encoder *encoder,
 143                            const struct drm_display_mode *mode,
 144                            struct drm_display_mode *adjusted_mode)
 145 {
 146         return true;
 147 }
 148
 149 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 150                 unsigned long serial_clk, unsigned long di_clk)
 151 {
 152         int ret;
 153
 154         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 155                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 156         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 157
 158         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 159                         clk_get_rate(ldb->clk_pll[chno]));
 160
 161         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 162                         clk_get_rate(ldb->clk[chno]),
 163                         (long int)di_clk);
 164         clk_set_rate(ldb->clk[chno], di_clk);
 165
 166         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 167                         clk_get_rate(ldb->clk[chno]));
 168
 169         /* set display clock mux to LDB input clock */
 170         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 171         if (ret)
 172                 dev_err(ldb->dev,
 173                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 174                         chno);
 175 }
 176
 177 static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
 178 {
 179         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 180         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 181         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 182         u32 bus_format;
 183
 184         switch (imx_ldb_ch->bus_format) {
 185         default:
 186                 dev_warn(ldb->dev,
 187                          "could not determine data mapping, default to 18-bit \"spwg\"\n");
 188                 /* fallthrough */
 189         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 190                 bus_format = MEDIA_BUS_FMT_RGB666_1X18;
 191                 break;
 192         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 193                 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 194                 if (imx_ldb_ch->chno == 0 || dual)
 195                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 196                 if (imx_ldb_ch->chno == 1 || dual)
 197                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 198                 break;
 199         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 200                 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 201                 if (imx_ldb_ch->chno == 0 || dual)
 202                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 203                                          LDB_BIT_MAP_CH0_JEIDA;
 204                 if (imx_ldb_ch->chno == 1 || dual)
 205                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 206                                          LDB_BIT_MAP_CH1_JEIDA;
 207                 break;
 208         }
 209
 210         imx_drm_set_bus_format(encoder, bus_format);
 211 }
 212
 213 static void imx_ldb_encoder_commit(struct drm_encoder *encoder)
 214 {
 215         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 216         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 217         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 218         int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->child, encoder);
 219
 220         drm_panel_prepare(imx_ldb_ch->panel);
 221
 222         if (dual) {
 223                 clk_prepare_enable(ldb->clk[0]);
 224                 clk_prepare_enable(ldb->clk[1]);
 225         }
 226
 227         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 228                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 229                 if (mux == 0 || ldb->lvds_mux)
 230                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 231                 else if (mux == 1)
 232                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 233         }
 234         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 235                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 236                 if (mux == 1 || ldb->lvds_mux)
 237                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 238                 else if (mux == 0)
 239                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 240         }
 241
 242         if (ldb->lvds_mux) {
 243                 const struct bus_mux *lvds_mux = NULL;
 244
 245                 if (imx_ldb_ch == &ldb->channel[0])
 246                         lvds_mux = &ldb->lvds_mux[0];
 247                 else if (imx_ldb_ch == &ldb->channel[1])
 248                         lvds_mux = &ldb->lvds_mux[1];
 249
 250                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 251                                    mux << lvds_mux->shift);
 252         }
 253
 254         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 255
 256         drm_panel_enable(imx_ldb_ch->panel);
 257 }
 258
 259 static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
 260                          struct drm_display_mode *orig_mode,
 261                          struct drm_display_mode *mode)
 262 {
 263         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 264         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 265         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 266         unsigned long serial_clk;
 267         unsigned long di_clk = mode->clock * 1000;
 268         int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->child, encoder);
 269
 270         if (mode->clock > 170000) {
 271                 dev_warn(ldb->dev,
 272                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 273         }
 274         if (mode->clock > 85000 && !dual) {
 275                 dev_warn(ldb->dev,
 276                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 277         }
 278
 279         if (dual) {
 280                 serial_clk = 3500UL * mode->clock;
 281                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 282                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 283         } else {
 284                 serial_clk = 7000UL * mode->clock;
 285                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 286                                   di_clk);
 287         }
 288
 289         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 290         if (imx_ldb_ch == &ldb->channel[0]) {
 291                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 292                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 293                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 294                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 295         }
 296         if (imx_ldb_ch == &ldb->channel[1]) {
 297                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 298                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 299                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 300                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 301         }
 302 }
 303
 304 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 305 {
 306         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 307         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 308         int mux, ret;
 309
 310         /*
 311          * imx_ldb_encoder_disable is called by
 312          * drm_helper_disable_unused_functions without
 313          * the encoder being enabled before.
 314          */
 315         if (imx_ldb_ch == &ldb->channel[0] &&
 316             (ldb->ldb_ctrl & LDB_CH0_MODE_EN_MASK) == 0)
 317                 return;
 318         else if (imx_ldb_ch == &ldb->channel[1] &&
 319                  (ldb->ldb_ctrl & LDB_CH1_MODE_EN_MASK) == 0)
 320                 return;
 321
 322         drm_panel_disable(imx_ldb_ch->panel);
 323
 324         if (imx_ldb_ch == &ldb->channel[0])
 325                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 326         else if (imx_ldb_ch == &ldb->channel[1])
 327                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 328
 329         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 330
 331         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 332                 clk_disable_unprepare(ldb->clk[0]);
 333                 clk_disable_unprepare(ldb->clk[1]);
 334         }
 335
 336         if (ldb->lvds_mux) {
 337                 const struct bus_mux *lvds_mux = NULL;
 338
 339                 if (imx_ldb_ch == &ldb->channel[0])
 340                         lvds_mux = &ldb->lvds_mux[0];
 341                 else if (imx_ldb_ch == &ldb->channel[1])
 342                         lvds_mux = &ldb->lvds_mux[1];
 343
 344                 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
 345                 mux &= lvds_mux->mask;
 346                 mux >>= lvds_mux->shift;
 347         } else {
 348                 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
 349         }
 350
 351         /* set display clock mux back to original input clock */
 352         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
 353         if (ret)
 354                 dev_err(ldb->dev,
 355                         "unable to set di%d parent clock to original parent\n",
 356                         mux);
 357
 358         drm_panel_unprepare(imx_ldb_ch->panel);
 359 }
 360
 361 static struct drm_connector_funcs imx_ldb_connector_funcs = {
 362         .dpms = drm_helper_connector_dpms,
 363         .fill_modes = drm_helper_probe_single_connector_modes,
 364         .detect = imx_ldb_connector_detect,
 365         .destroy = imx_drm_connector_destroy,
 366 };
 367
 368 static struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 369         .get_modes = imx_ldb_connector_get_modes,
 370         .best_encoder = imx_ldb_connector_best_encoder,
 371 };
 372
 373 static struct drm_encoder_funcs imx_ldb_encoder_funcs = {
 374         .destroy = imx_drm_encoder_destroy,
 375 };
 376
 377 static struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 378         .dpms = imx_ldb_encoder_dpms,
 379         .mode_fixup = imx_ldb_encoder_mode_fixup,
 380         .prepare = imx_ldb_encoder_prepare,
 381         .commit = imx_ldb_encoder_commit,
 382         .mode_set = imx_ldb_encoder_mode_set,
 383         .disable = imx_ldb_encoder_disable,
 384 };
 385
 386 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 387 {
 388         char clkname[16];
 389
 390         snprintf(clkname, sizeof(clkname), "di%d", chno);
 391         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 392         if (IS_ERR(ldb->clk[chno]))
 393                 return PTR_ERR(ldb->clk[chno]);
 394
 395         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 396         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 397
 398         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 399 }
 400
 401 static int imx_ldb_register(struct drm_device *drm,
 402         struct imx_ldb_channel *imx_ldb_ch)
 403 {
 404         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 405         int ret;
 406
 407         ret = imx_drm_encoder_parse_of(drm, &imx_ldb_ch->encoder,
 408                                        imx_ldb_ch->child);
 409         if (ret)
 410                 return ret;
 411
 412         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 413         if (ret)
 414                 return ret;
 415
 416         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 417                 ret = imx_ldb_get_clk(ldb, 1);
 418                 if (ret)
 419                         return ret;
 420         }
 421
 422         drm_encoder_helper_add(&imx_ldb_ch->encoder,
 423                         &imx_ldb_encoder_helper_funcs);
 424         drm_encoder_init(drm, &imx_ldb_ch->encoder, &imx_ldb_encoder_funcs,
 425                          DRM_MODE_ENCODER_LVDS);
 426
 427         drm_connector_helper_add(&imx_ldb_ch->connector,
 428                         &imx_ldb_connector_helper_funcs);
 429         drm_connector_init(drm, &imx_ldb_ch->connector,
 430                            &imx_ldb_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
 431
 432         if (imx_ldb_ch->panel)
 433                 drm_panel_attach(imx_ldb_ch->panel, &imx_ldb_ch->connector);
 434
 435         drm_mode_connector_attach_encoder(&imx_ldb_ch->connector,
 436                         &imx_ldb_ch->encoder);
 437
 438         return 0;
 439 }
 440
 441 enum {
 442         LVDS_BIT_MAP_SPWG,
 443         LVDS_BIT_MAP_JEIDA
 444 };
 445
 446 struct imx_ldb_bit_mapping {
 447         u32 bus_format;
 448         u32 datawidth;
 449         const char * const mapping;
 450 };
 451
 452 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
 453         { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,  18, "spwg" },
 454         { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,  24, "spwg" },
 455         { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
 456 };
 457
 458 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
 459 {
 460         const char *bm;
 461         u32 datawidth = 0;
 462         int ret, i;
 463
 464         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 465         if (ret < 0)
 466                 return ret;
 467
 468         of_property_read_u32(np, "fsl,data-width", &datawidth);
 469
 470         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
 471                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
 472                     datawidth == imx_ldb_bit_mappings[i].datawidth)
 473                         return imx_ldb_bit_mappings[i].bus_format;
 474         }
 475
 476         dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
 477
 478         return -ENOENT;
 479 }
 480
 481 static struct bus_mux imx6q_lvds_mux[2] = {
 482         {
 483                 .reg = IOMUXC_GPR3,
 484                 .shift = 6,
 485                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 486         }, {
 487                 .reg = IOMUXC_GPR3,
 488                 .shift = 8,
 489                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 490         }
 491 };
 492
 493 /*
 494  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 495  * of_match_device will walk through this list and take the first entry
 496  * matching any of its compatible values. Therefore, the more generic
 497  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 498  */
 499 static const struct of_device_id imx_ldb_dt_ids[] = {
 500         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 501         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 502         { }
 503 };
 504 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 505
 506 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 507 {
 508         struct drm_device *drm = data;
 509         struct device_node *np = dev->of_node;
 510         const struct of_device_id *of_id =
 511                         of_match_device(imx_ldb_dt_ids, dev);
 512         struct device_node *child;
 513         const u8 *edidp;
 514         struct imx_ldb *imx_ldb;
 515         int dual;
 516         int ret;
 517         int i;
 518
 519         imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
 520         if (!imx_ldb)
 521                 return -ENOMEM;
 522
 523         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 524         if (IS_ERR(imx_ldb->regmap)) {
 525                 dev_err(dev, "failed to get parent regmap\n");
 526                 return PTR_ERR(imx_ldb->regmap);
 527         }
 528
 529         imx_ldb->dev = dev;
 530
 531         if (of_id)
 532                 imx_ldb->lvds_mux = of_id->data;
 533
 534         dual = of_property_read_bool(np, "fsl,dual-channel");
 535         if (dual)
 536                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 537
 538         /*
 539          * There are three different possible clock mux configurations:
 540          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 541          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 542          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 543          * Map them all to di0_sel...di3_sel.
 544          */
 545         for (i = 0; i < 4; i++) {
 546                 char clkname[16];
 547
 548                 sprintf(clkname, "di%d_sel", i);
 549                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 550                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 551                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 552                         imx_ldb->clk_sel[i] = NULL;
 553                         break;
 554                 }
 555
 556                 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
 557         }
 558         if (i == 0)
 559                 return ret;
 560
 561         for_each_child_of_node(np, child) {
 562                 struct imx_ldb_channel *channel;
 563                 struct device_node *port;
 564
 565                 ret = of_property_read_u32(child, "reg", &i);
 566                 if (ret || i < 0 || i > 1)
 567                         return -EINVAL;
 568
 569                 if (dual && i > 0) {
 570                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 571                         continue;
 572                 }
 573
 574                 if (!of_device_is_available(child))
 575                         continue;
 576
 577                 channel = &imx_ldb->channel[i];
 578                 channel->ldb = imx_ldb;
 579                 channel->chno = i;
 580                 channel->child = child;
 581
 582                 /*
 583                  * The output port is port@4 with an external 4-port mux or
 584                  * port@2 with the internal 2-port mux.
 585                  */
 586                 port = of_graph_get_port_by_id(child, imx_ldb->lvds_mux ? 4 : 2);
 587                 if (port) {
 588                         struct device_node *endpoint, *remote;
 589
 590                         endpoint = of_get_child_by_name(port, "endpoint");
 591                         if (endpoint) {
 592                                 remote = of_graph_get_remote_port_parent(endpoint);
 593                                 if (remote)
 594                                         channel->panel = of_drm_find_panel(remote);
 595                                 else
 596                                         return -EPROBE_DEFER;
 597                                 if (!channel->panel) {
 598                                         dev_err(dev, "panel not found: %s\n",
 599                                                 remote->full_name);
 600                                         return -EPROBE_DEFER;
 601                                 }
 602                         }
 603                 }
 604
 605                 edidp = of_get_property(child, "edid", &channel->edid_len);
 606                 if (edidp) {
 607                         channel->edid = kmemdup(edidp, channel->edid_len,
 608                                                 GFP_KERNEL);
 609                 } else if (!channel->panel) {
 610                         ret = of_get_drm_display_mode(child, &channel->mode, 0);
 611                         if (!ret)
 612                                 channel->mode_valid = 1;
 613                 }
 614
 615                 channel->bus_format = of_get_bus_format(dev, child);
 616                 if (channel->bus_format == -EINVAL) {
 617                         /*
 618                          * If no bus format was specified in the device tree,
 619                          * we can still get it from the connected panel later.
 620                          */
 621                         if (channel->panel && channel->panel->funcs &&
 622                             channel->panel->funcs->get_modes)
 623                                 channel->bus_format = 0;
 624                 }
 625                 if (channel->bus_format < 0) {
 626                         dev_err(dev, "could not determine data mapping: %d\n",
 627                                 channel->bus_format);
 628                         return channel->bus_format;
 629                 }
 630
 631                 ret = imx_ldb_register(drm, channel);
 632                 if (ret)
 633                         return ret;
 634         }
 635
 636         dev_set_drvdata(dev, imx_ldb);
 637
 638         return 0;
 639 }
 640
 641 static void imx_ldb_unbind(struct device *dev, struct device *master,
 642         void *data)
 643 {
 644         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 645         int i;
 646
 647         for (i = 0; i < 2; i++) {
 648                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 649
 650                 if (!channel->connector.funcs)
 651                         continue;
 652
 653                 channel->connector.funcs->destroy(&channel->connector);
 654                 channel->encoder.funcs->destroy(&channel->encoder);
 655
 656                 kfree(channel->edid);
 657         }
 658 }
 659
 660 static const struct component_ops imx_ldb_ops = {
 661         .bind   = imx_ldb_bind,
 662         .unbind = imx_ldb_unbind,
 663 };
 664
 665 static int imx_ldb_probe(struct platform_device *pdev)
 666 {
 667         return component_add(&pdev->dev, &imx_ldb_ops);
 668 }
 669
 670 static int imx_ldb_remove(struct platform_device *pdev)
 671 {
 672         component_del(&pdev->dev, &imx_ldb_ops);
 673         return 0;
 674 }
 675
 676 static struct platform_driver imx_ldb_driver = {
 677         .probe          = imx_ldb_probe,
 678         .remove         = imx_ldb_remove,
 679         .driver         = {
 680                 .of_match_table = imx_ldb_dt_ids,
 681                 .name   = DRIVER_NAME,
 682         },
 683 };
 684
 685 module_platform_driver(imx_ldb_driver);
 686
 687 MODULE_DESCRIPTION("i.MX LVDS driver");
 688 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 689 MODULE_LICENSE("GPL");
 690 MODULE_ALIAS("platform:" DRIVER_NAME);