x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / arch / arm / mach-ixp4xx / fsg-pci.c
blobfd4a8625b4ae7508eda6b100de10343687561c83
1 /*
2 * arch/arch/mach-ixp4xx/fsg-pci.c
4 * FSG board-level PCI initialization
6 * Author: Rod Whitby <rod@whitby.id.au>
7 * Maintainer: http://www.nslu2-linux.org/
9 * based on ixdp425-pci.c:
10 * Copyright (C) 2002 Intel Corporation.
11 * Copyright (C) 2003-2004 MontaVista Software, Inc.
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
19 #include <linux/pci.h>
20 #include <linux/init.h>
21 #include <linux/irq.h>
22 #include <asm/mach/pci.h>
23 #include <asm/mach-types.h>
25 #define MAX_DEV 3
26 #define IRQ_LINES 3
28 /* PCI controller GPIO to IRQ pin mappings */
29 #define INTA 6
30 #define INTB 7
31 #define INTC 5
33 void __init fsg_pci_preinit(void)
35 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
36 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
37 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
38 ixp4xx_pci_preinit();
41 static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
43 static int pci_irq_table[IRQ_LINES] = {
44 IXP4XX_GPIO_IRQ(INTC),
45 IXP4XX_GPIO_IRQ(INTB),
46 IXP4XX_GPIO_IRQ(INTA),
49 int irq = -1;
50 slot -= 11;
52 if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
53 irq = pci_irq_table[slot - 1];
54 printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n",
55 __func__, slot, pin, irq);
57 return irq;
60 struct hw_pci fsg_pci __initdata = {
61 .nr_controllers = 1,
62 .ops = &ixp4xx_ops,
63 .preinit = fsg_pci_preinit,
64 .setup = ixp4xx_setup,
65 .map_irq = fsg_map_irq,
68 int __init fsg_pci_init(void)
70 if (machine_is_fsg())
71 pci_common_init(&fsg_pci);
72 return 0;
75 subsys_initcall(fsg_pci_init);