drivers/mtd/devices/mtd_dataflash.c

   1 /*
   2  * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
   3  *
   4  * Largely derived from at91_dataflash.c:
   5  *  Copyright (C) 2003-2005 SAN People (Pty) Ltd
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * as published by the Free Software Foundation; either version
  10  * 2 of the License, or (at your option) any later version.
  11 */
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/slab.h>
  15 #include <linux/delay.h>
  16 #include <linux/device.h>
  17 #include <linux/mutex.h>
  18 #include <linux/err.h>
  19 #include <linux/math64.h>
  20 #include <linux/of.h>
  21 #include <linux/of_device.h>
  22
  23 #include <linux/spi/spi.h>
  24 #include <linux/spi/flash.h>
  25
  26 #include <linux/mtd/mtd.h>
  27 #include <linux/mtd/partitions.h>
  28
  29 /*
  30  * DataFlash is a kind of SPI flash.  Most AT45 chips have two buffers in
  31  * each chip, which may be used for double buffered I/O; but this driver
  32  * doesn't (yet) use these for any kind of i/o overlap or prefetching.
  33  *
  34  * Sometimes DataFlash is packaged in MMC-format cards, although the
  35  * MMC stack can't (yet?) distinguish between MMC and DataFlash
  36  * protocols during enumeration.
  37  */
  38
  39 /* reads can bypass the buffers */
  40 #define OP_READ_CONTINUOUS      0xE8
  41 #define OP_READ_PAGE            0xD2
  42
  43 /* group B requests can run even while status reports "busy" */
  44 #define OP_READ_STATUS          0xD7    /* group B */
  45
  46 /* move data between host and buffer */
  47 #define OP_READ_BUFFER1         0xD4    /* group B */
  48 #define OP_READ_BUFFER2         0xD6    /* group B */
  49 #define OP_WRITE_BUFFER1        0x84    /* group B */
  50 #define OP_WRITE_BUFFER2        0x87    /* group B */
  51
  52 /* erasing flash */
  53 #define OP_ERASE_PAGE           0x81
  54 #define OP_ERASE_BLOCK          0x50
  55
  56 /* move data between buffer and flash */
  57 #define OP_TRANSFER_BUF1        0x53
  58 #define OP_TRANSFER_BUF2        0x55
  59 #define OP_MREAD_BUFFER1        0xD4
  60 #define OP_MREAD_BUFFER2        0xD6
  61 #define OP_MWERASE_BUFFER1      0x83
  62 #define OP_MWERASE_BUFFER2      0x86
  63 #define OP_MWRITE_BUFFER1       0x88    /* sector must be pre-erased */
  64 #define OP_MWRITE_BUFFER2       0x89    /* sector must be pre-erased */
  65
  66 /* write to buffer, then write-erase to flash */
  67 #define OP_PROGRAM_VIA_BUF1     0x82
  68 #define OP_PROGRAM_VIA_BUF2     0x85
  69
  70 /* compare buffer to flash */
  71 #define OP_COMPARE_BUF1         0x60
  72 #define OP_COMPARE_BUF2         0x61
  73
  74 /* read flash to buffer, then write-erase to flash */
  75 #define OP_REWRITE_VIA_BUF1     0x58
  76 #define OP_REWRITE_VIA_BUF2     0x59
  77
  78 /* newer chips report JEDEC manufacturer and device IDs; chip
  79  * serial number and OTP bits; and per-sector writeprotect.
  80  */
  81 #define OP_READ_ID              0x9F
  82 #define OP_READ_SECURITY        0x77
  83 #define OP_WRITE_SECURITY_REVC  0x9A
  84 #define OP_WRITE_SECURITY       0x9B    /* revision D */
  85
  86
  87 struct dataflash {
  88         uint8_t                 command[4];
  89         char                    name[24];
  90
  91         unsigned short          page_offset;    /* offset in flash address */
  92         unsigned int            page_size;      /* of bytes per page */
  93
  94         struct mutex            lock;
  95         struct spi_device       *spi;
  96
  97         struct mtd_info         mtd;
  98 };
  99
 100 #ifdef CONFIG_OF
 101 static const struct of_device_id dataflash_dt_ids[] = {
 102         { .compatible = "atmel,at45", },
 103         { .compatible = "atmel,dataflash", },
 104         { /* sentinel */ }
 105 };
 106 #endif
 107
 108 /* ......................................................................... */
 109
 110 /*
 111  * Return the status of the DataFlash device.
 112  */
 113 static inline int dataflash_status(struct spi_device *spi)
 114 {
 115         /* NOTE:  at45db321c over 25 MHz wants to write
 116          * a dummy byte after the opcode...
 117          */
 118         return spi_w8r8(spi, OP_READ_STATUS);
 119 }
 120
 121 /*
 122  * Poll the DataFlash device until it is READY.
 123  * This usually takes 5-20 msec or so; more for sector erase.
 124  */
 125 static int dataflash_waitready(struct spi_device *spi)
 126 {
 127         int     status;
 128
 129         for (;;) {
 130                 status = dataflash_status(spi);
 131                 if (status < 0) {
 132                         pr_debug("%s: status %d?\n",
 133                                         dev_name(&spi->dev), status);
 134                         status = 0;
 135                 }
 136
 137                 if (status & (1 << 7))  /* RDY/nBSY */
 138                         return status;
 139
 140                 msleep(3);
 141         }
 142 }
 143
 144 /* ......................................................................... */
 145
 146 /*
 147  * Erase pages of flash.
 148  */
 149 static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
 150 {
 151         struct dataflash        *priv = mtd->priv;
 152         struct spi_device       *spi = priv->spi;
 153         struct spi_transfer     x = { .tx_dma = 0, };
 154         struct spi_message      msg;
 155         unsigned                blocksize = priv->page_size << 3;
 156         uint8_t                 *command;
 157         uint32_t                rem;
 158
 159         pr_debug("%s: erase addr=0x%llx len 0x%llx\n",
 160               dev_name(&spi->dev), (long long)instr->addr,
 161               (long long)instr->len);
 162
 163         div_u64_rem(instr->len, priv->page_size, &rem);
 164         if (rem)
 165                 return -EINVAL;
 166         div_u64_rem(instr->addr, priv->page_size, &rem);
 167         if (rem)
 168                 return -EINVAL;
 169
 170         spi_message_init(&msg);
 171
 172         x.tx_buf = command = priv->command;
 173         x.len = 4;
 174         spi_message_add_tail(&x, &msg);
 175
 176         mutex_lock(&priv->lock);
 177         while (instr->len > 0) {
 178                 unsigned int    pageaddr;
 179                 int             status;
 180                 int             do_block;
 181
 182                 /* Calculate flash page address; use block erase (for speed) if
 183                  * we're at a block boundary and need to erase the whole block.
 184                  */
 185                 pageaddr = div_u64(instr->addr, priv->page_size);
 186                 do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
 187                 pageaddr = pageaddr << priv->page_offset;
 188
 189                 command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
 190                 command[1] = (uint8_t)(pageaddr >> 16);
 191                 command[2] = (uint8_t)(pageaddr >> 8);
 192                 command[3] = 0;
 193
 194                 pr_debug("ERASE %s: (%x) %x %x %x [%i]\n",
 195                         do_block ? "block" : "page",
 196                         command[0], command[1], command[2], command[3],
 197                         pageaddr);
 198
 199                 status = spi_sync(spi, &msg);
 200                 (void) dataflash_waitready(spi);
 201
 202                 if (status < 0) {
 203                         printk(KERN_ERR "%s: erase %x, err %d\n",
 204                                 dev_name(&spi->dev), pageaddr, status);
 205                         /* REVISIT:  can retry instr->retries times; or
 206                          * giveup and instr->fail_addr = instr->addr;
 207                          */
 208                         continue;
 209                 }
 210
 211                 if (do_block) {
 212                         instr->addr += blocksize;
 213                         instr->len -= blocksize;
 214                 } else {
 215                         instr->addr += priv->page_size;
 216                         instr->len -= priv->page_size;
 217                 }
 218         }
 219         mutex_unlock(&priv->lock);
 220
 221         /* Inform MTD subsystem that erase is complete */
 222         instr->state = MTD_ERASE_DONE;
 223         mtd_erase_callback(instr);
 224
 225         return 0;
 226 }
 227
 228 /*
 229  * Read from the DataFlash device.
 230  *   from   : Start offset in flash device
 231  *   len    : Amount to read
 232  *   retlen : About of data actually read
 233  *   buf    : Buffer containing the data
 234  */
 235 static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
 236                                size_t *retlen, u_char *buf)
 237 {
 238         struct dataflash        *priv = mtd->priv;
 239         struct spi_transfer     x[2] = { { .tx_dma = 0, }, };
 240         struct spi_message      msg;
 241         unsigned int            addr;
 242         uint8_t                 *command;
 243         int                     status;
 244
 245         pr_debug("%s: read 0x%x..0x%x\n", dev_name(&priv->spi->dev),
 246                         (unsigned)from, (unsigned)(from + len));
 247
 248         /* Calculate flash page/byte address */
 249         addr = (((unsigned)from / priv->page_size) << priv->page_offset)
 250                 + ((unsigned)from % priv->page_size);
 251
 252         command = priv->command;
 253
 254         pr_debug("READ: (%x) %x %x %x\n",
 255                 command[0], command[1], command[2], command[3]);
 256
 257         spi_message_init(&msg);
 258
 259         x[0].tx_buf = command;
 260         x[0].len = 8;
 261         spi_message_add_tail(&x[0], &msg);
 262
 263         x[1].rx_buf = buf;
 264         x[1].len = len;
 265         spi_message_add_tail(&x[1], &msg);
 266
 267         mutex_lock(&priv->lock);
 268
 269         /* Continuous read, max clock = f(car) which may be less than
 270          * the peak rate available.  Some chips support commands with
 271          * fewer "don't care" bytes.  Both buffers stay unchanged.
 272          */
 273         command[0] = OP_READ_CONTINUOUS;
 274         command[1] = (uint8_t)(addr >> 16);
 275         command[2] = (uint8_t)(addr >> 8);
 276         command[3] = (uint8_t)(addr >> 0);
 277         /* plus 4 "don't care" bytes */
 278
 279         status = spi_sync(priv->spi, &msg);
 280         mutex_unlock(&priv->lock);
 281
 282         if (status >= 0) {
 283                 *retlen = msg.actual_length - 8;
 284                 status = 0;
 285         } else
 286                 pr_debug("%s: read %x..%x --> %d\n",
 287                         dev_name(&priv->spi->dev),
 288                         (unsigned)from, (unsigned)(from + len),
 289                         status);
 290         return status;
 291 }
 292
 293 /*
 294  * Write to the DataFlash device.
 295  *   to     : Start offset in flash device
 296  *   len    : Amount to write
 297  *   retlen : Amount of data actually written
 298  *   buf    : Buffer containing the data
 299  */
 300 static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
 301                                 size_t * retlen, const u_char * buf)
 302 {
 303         struct dataflash        *priv = mtd->priv;
 304         struct spi_device       *spi = priv->spi;
 305         struct spi_transfer     x[2] = { { .tx_dma = 0, }, };
 306         struct spi_message      msg;
 307         unsigned int            pageaddr, addr, offset, writelen;
 308         size_t                  remaining = len;
 309         u_char                  *writebuf = (u_char *) buf;
 310         int                     status = -EINVAL;
 311         uint8_t                 *command;
 312
 313         pr_debug("%s: write 0x%x..0x%x\n",
 314                 dev_name(&spi->dev), (unsigned)to, (unsigned)(to + len));
 315
 316         spi_message_init(&msg);
 317
 318         x[0].tx_buf = command = priv->command;
 319         x[0].len = 4;
 320         spi_message_add_tail(&x[0], &msg);
 321
 322         pageaddr = ((unsigned)to / priv->page_size);
 323         offset = ((unsigned)to % priv->page_size);
 324         if (offset + len > priv->page_size)
 325                 writelen = priv->page_size - offset;
 326         else
 327                 writelen = len;
 328
 329         mutex_lock(&priv->lock);
 330         while (remaining > 0) {
 331                 pr_debug("write @ %i:%i len=%i\n",
 332                         pageaddr, offset, writelen);
 333
 334                 /* REVISIT:
 335                  * (a) each page in a sector must be rewritten at least
 336                  *     once every 10K sibling erase/program operations.
 337                  * (b) for pages that are already erased, we could
 338                  *     use WRITE+MWRITE not PROGRAM for ~30% speedup.
 339                  * (c) WRITE to buffer could be done while waiting for
 340                  *     a previous MWRITE/MWERASE to complete ...
 341                  * (d) error handling here seems to be mostly missing.
 342                  *
 343                  * Two persistent bits per page, plus a per-sector counter,
 344                  * could support (a) and (b) ... we might consider using
 345                  * the second half of sector zero, which is just one block,
 346                  * to track that state.  (On AT91, that sector should also
 347                  * support boot-from-DataFlash.)
 348                  */
 349
 350                 addr = pageaddr << priv->page_offset;
 351
 352                 /* (1) Maybe transfer partial page to Buffer1 */
 353                 if (writelen != priv->page_size) {
 354                         command[0] = OP_TRANSFER_BUF1;
 355                         command[1] = (addr & 0x00FF0000) >> 16;
 356                         command[2] = (addr & 0x0000FF00) >> 8;
 357                         command[3] = 0;
 358
 359                         pr_debug("TRANSFER: (%x) %x %x %x\n",
 360                                 command[0], command[1], command[2], command[3]);
 361
 362                         status = spi_sync(spi, &msg);
 363                         if (status < 0)
 364                                 pr_debug("%s: xfer %u -> %d\n",
 365                                         dev_name(&spi->dev), addr, status);
 366
 367                         (void) dataflash_waitready(priv->spi);
 368                 }
 369
 370                 /* (2) Program full page via Buffer1 */
 371                 addr += offset;
 372                 command[0] = OP_PROGRAM_VIA_BUF1;
 373                 command[1] = (addr & 0x00FF0000) >> 16;
 374                 command[2] = (addr & 0x0000FF00) >> 8;
 375                 command[3] = (addr & 0x000000FF);
 376
 377                 pr_debug("PROGRAM: (%x) %x %x %x\n",
 378                         command[0], command[1], command[2], command[3]);
 379
 380                 x[1].tx_buf = writebuf;
 381                 x[1].len = writelen;
 382                 spi_message_add_tail(x + 1, &msg);
 383                 status = spi_sync(spi, &msg);
 384                 spi_transfer_del(x + 1);
 385                 if (status < 0)
 386                         pr_debug("%s: pgm %u/%u -> %d\n",
 387                                 dev_name(&spi->dev), addr, writelen, status);
 388
 389                 (void) dataflash_waitready(priv->spi);
 390
 391
 392 #ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY
 393
 394                 /* (3) Compare to Buffer1 */
 395                 addr = pageaddr << priv->page_offset;
 396                 command[0] = OP_COMPARE_BUF1;
 397                 command[1] = (addr & 0x00FF0000) >> 16;
 398                 command[2] = (addr & 0x0000FF00) >> 8;
 399                 command[3] = 0;
 400
 401                 pr_debug("COMPARE: (%x) %x %x %x\n",
 402                         command[0], command[1], command[2], command[3]);
 403
 404                 status = spi_sync(spi, &msg);
 405                 if (status < 0)
 406                         pr_debug("%s: compare %u -> %d\n",
 407                                 dev_name(&spi->dev), addr, status);
 408
 409                 status = dataflash_waitready(priv->spi);
 410
 411                 /* Check result of the compare operation */
 412                 if (status & (1 << 6)) {
 413                         printk(KERN_ERR "%s: compare page %u, err %d\n",
 414                                 dev_name(&spi->dev), pageaddr, status);
 415                         remaining = 0;
 416                         status = -EIO;
 417                         break;
 418                 } else
 419                         status = 0;
 420
 421 #endif  /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */
 422
 423                 remaining = remaining - writelen;
 424                 pageaddr++;
 425                 offset = 0;
 426                 writebuf += writelen;
 427                 *retlen += writelen;
 428
 429                 if (remaining > priv->page_size)
 430                         writelen = priv->page_size;
 431                 else
 432                         writelen = remaining;
 433         }
 434         mutex_unlock(&priv->lock);
 435
 436         return status;
 437 }
 438
 439 /* ......................................................................... */
 440
 441 #ifdef CONFIG_MTD_DATAFLASH_OTP
 442
 443 static int dataflash_get_otp_info(struct mtd_info *mtd,
 444                 struct otp_info *info, size_t len)
 445 {
 446         /* Report both blocks as identical:  bytes 0..64, locked.
 447          * Unless the user block changed from all-ones, we can't
 448          * tell whether it's still writable; so we assume it isn't.
 449          */
 450         info->start = 0;
 451         info->length = 64;
 452         info->locked = 1;
 453         return sizeof(*info);
 454 }
 455
 456 static ssize_t otp_read(struct spi_device *spi, unsigned base,
 457                 uint8_t *buf, loff_t off, size_t len)
 458 {
 459         struct spi_message      m;
 460         size_t                  l;
 461         uint8_t                 *scratch;
 462         struct spi_transfer     t;
 463         int                     status;
 464
 465         if (off > 64)
 466                 return -EINVAL;
 467
 468         if ((off + len) > 64)
 469                 len = 64 - off;
 470
 471         spi_message_init(&m);
 472
 473         l = 4 + base + off + len;
 474         scratch = kzalloc(l, GFP_KERNEL);
 475         if (!scratch)
 476                 return -ENOMEM;
 477
 478         /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
 479          * IN:  ignore 4 bytes, data bytes 0..N (max 127)
 480          */
 481         scratch[0] = OP_READ_SECURITY;
 482
 483         memset(&t, 0, sizeof t);
 484         t.tx_buf = scratch;
 485         t.rx_buf = scratch;
 486         t.len = l;
 487         spi_message_add_tail(&t, &m);
 488
 489         dataflash_waitready(spi);
 490
 491         status = spi_sync(spi, &m);
 492         if (status >= 0) {
 493                 memcpy(buf, scratch + 4 + base + off, len);
 494                 status = len;
 495         }
 496
 497         kfree(scratch);
 498         return status;
 499 }
 500
 501 static int dataflash_read_fact_otp(struct mtd_info *mtd,
 502                 loff_t from, size_t len, size_t *retlen, u_char *buf)
 503 {
 504         struct dataflash        *priv = mtd->priv;
 505         int                     status;
 506
 507         /* 64 bytes, from 0..63 ... start at 64 on-chip */
 508         mutex_lock(&priv->lock);
 509         status = otp_read(priv->spi, 64, buf, from, len);
 510         mutex_unlock(&priv->lock);
 511
 512         if (status < 0)
 513                 return status;
 514         *retlen = status;
 515         return 0;
 516 }
 517
 518 static int dataflash_read_user_otp(struct mtd_info *mtd,
 519                 loff_t from, size_t len, size_t *retlen, u_char *buf)
 520 {
 521         struct dataflash        *priv = mtd->priv;
 522         int                     status;
 523
 524         /* 64 bytes, from 0..63 ... start at 0 on-chip */
 525         mutex_lock(&priv->lock);
 526         status = otp_read(priv->spi, 0, buf, from, len);
 527         mutex_unlock(&priv->lock);
 528
 529         if (status < 0)
 530                 return status;
 531         *retlen = status;
 532         return 0;
 533 }
 534
 535 static int dataflash_write_user_otp(struct mtd_info *mtd,
 536                 loff_t from, size_t len, size_t *retlen, u_char *buf)
 537 {
 538         struct spi_message      m;
 539         const size_t            l = 4 + 64;
 540         uint8_t                 *scratch;
 541         struct spi_transfer     t;
 542         struct dataflash        *priv = mtd->priv;
 543         int                     status;
 544
 545         if (len > 64)
 546                 return -EINVAL;
 547
 548         /* Strictly speaking, we *could* truncate the write ... but
 549          * let's not do that for the only write that's ever possible.
 550          */
 551         if ((from + len) > 64)
 552                 return -EINVAL;
 553
 554         /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
 555          * IN:  ignore all
 556          */
 557         scratch = kzalloc(l, GFP_KERNEL);
 558         if (!scratch)
 559                 return -ENOMEM;
 560         scratch[0] = OP_WRITE_SECURITY;
 561         memcpy(scratch + 4 + from, buf, len);
 562
 563         spi_message_init(&m);
 564
 565         memset(&t, 0, sizeof t);
 566         t.tx_buf = scratch;
 567         t.len = l;
 568         spi_message_add_tail(&t, &m);
 569
 570         /* Write the OTP bits, if they've not yet been written.
 571          * This modifies SRAM buffer1.
 572          */
 573         mutex_lock(&priv->lock);
 574         dataflash_waitready(priv->spi);
 575         status = spi_sync(priv->spi, &m);
 576         mutex_unlock(&priv->lock);
 577
 578         kfree(scratch);
 579
 580         if (status >= 0) {
 581                 status = 0;
 582                 *retlen = len;
 583         }
 584         return status;
 585 }
 586
 587 static char *otp_setup(struct mtd_info *device, char revision)
 588 {
 589         device->_get_fact_prot_info = dataflash_get_otp_info;
 590         device->_read_fact_prot_reg = dataflash_read_fact_otp;
 591         device->_get_user_prot_info = dataflash_get_otp_info;
 592         device->_read_user_prot_reg = dataflash_read_user_otp;
 593
 594         /* rev c parts (at45db321c and at45db1281 only!) use a
 595          * different write procedure; not (yet?) implemented.
 596          */
 597         if (revision > 'c')
 598                 device->_write_user_prot_reg = dataflash_write_user_otp;
 599
 600         return ", OTP";
 601 }
 602
 603 #else
 604
 605 static char *otp_setup(struct mtd_info *device, char revision)
 606 {
 607         return " (OTP)";
 608 }
 609
 610 #endif
 611
 612 /* ......................................................................... */
 613
 614 /*
 615  * Register DataFlash device with MTD subsystem.
 616  */
 617 static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages,
 618                              int pagesize, int pageoffset, char revision)
 619 {
 620         struct dataflash                *priv;
 621         struct mtd_info                 *device;
 622         struct mtd_part_parser_data     ppdata;
 623         struct flash_platform_data      *pdata = dev_get_platdata(&spi->dev);
 624         char                            *otp_tag = "";
 625         int                             err = 0;
 626
 627         priv = kzalloc(sizeof *priv, GFP_KERNEL);
 628         if (!priv)
 629                 return -ENOMEM;
 630
 631         mutex_init(&priv->lock);
 632         priv->spi = spi;
 633         priv->page_size = pagesize;
 634         priv->page_offset = pageoffset;
 635
 636         /* name must be usable with cmdlinepart */
 637         sprintf(priv->name, "spi%d.%d-%s",
 638                         spi->master->bus_num, spi->chip_select,
 639                         name);
 640
 641         device = &priv->mtd;
 642         device->name = (pdata && pdata->name) ? pdata->name : priv->name;
 643         device->size = nr_pages * pagesize;
 644         device->erasesize = pagesize;
 645         device->writesize = pagesize;
 646         device->owner = THIS_MODULE;
 647         device->type = MTD_DATAFLASH;
 648         device->flags = MTD_WRITEABLE;
 649         device->_erase = dataflash_erase;
 650         device->_read = dataflash_read;
 651         device->_write = dataflash_write;
 652         device->priv = priv;
 653
 654         device->dev.parent = &spi->dev;
 655
 656         if (revision >= 'c')
 657                 otp_tag = otp_setup(device, revision);
 658
 659         dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n",
 660                         name, (long long)((device->size + 1023) >> 10),
 661                         pagesize, otp_tag);
 662         spi_set_drvdata(spi, priv);
 663
 664         ppdata.of_node = spi->dev.of_node;
 665         err = mtd_device_parse_register(device, NULL, &ppdata,
 666                         pdata ? pdata->parts : NULL,
 667                         pdata ? pdata->nr_parts : 0);
 668
 669         if (!err)
 670                 return 0;
 671
 672         kfree(priv);
 673         return err;
 674 }
 675
 676 static inline int add_dataflash(struct spi_device *spi, char *name,
 677                                 int nr_pages, int pagesize, int pageoffset)
 678 {
 679         return add_dataflash_otp(spi, name, nr_pages, pagesize,
 680                         pageoffset, 0);
 681 }
 682
 683 struct flash_info {
 684         char            *name;
 685
 686         /* JEDEC id has a high byte of zero plus three data bytes:
 687          * the manufacturer id, then a two byte device id.
 688          */
 689         uint32_t        jedec_id;
 690
 691         /* The size listed here is what works with OP_ERASE_PAGE. */
 692         unsigned        nr_pages;
 693         uint16_t        pagesize;
 694         uint16_t        pageoffset;
 695
 696         uint16_t        flags;
 697 #define SUP_POW2PS      0x0002          /* supports 2^N byte pages */
 698 #define IS_POW2PS       0x0001          /* uses 2^N byte pages */
 699 };
 700
 701 static struct flash_info dataflash_data[] = {
 702
 703         /*
 704          * NOTE:  chips with SUP_POW2PS (rev D and up) need two entries,
 705          * one with IS_POW2PS and the other without.  The entry with the
 706          * non-2^N byte page size can't name exact chip revisions without
 707          * losing backwards compatibility for cmdlinepart.
 708          *
 709          * These newer chips also support 128-byte security registers (with
 710          * 64 bytes one-time-programmable) and software write-protection.
 711          */
 712         { "AT45DB011B",  0x1f2200, 512, 264, 9, SUP_POW2PS},
 713         { "at45db011d",  0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
 714
 715         { "AT45DB021B",  0x1f2300, 1024, 264, 9, SUP_POW2PS},
 716         { "at45db021d",  0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
 717
 718         { "AT45DB041x",  0x1f2400, 2048, 264, 9, SUP_POW2PS},
 719         { "at45db041d",  0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
 720
 721         { "AT45DB081B",  0x1f2500, 4096, 264, 9, SUP_POW2PS},
 722         { "at45db081d",  0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
 723
 724         { "AT45DB161x",  0x1f2600, 4096, 528, 10, SUP_POW2PS},
 725         { "at45db161d",  0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
 726
 727         { "AT45DB321x",  0x1f2700, 8192, 528, 10, 0},           /* rev C */
 728
 729         { "AT45DB321x",  0x1f2701, 8192, 528, 10, SUP_POW2PS},
 730         { "at45db321d",  0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
 731
 732         { "AT45DB642x",  0x1f2800, 8192, 1056, 11, SUP_POW2PS},
 733         { "at45db642d",  0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
 734 };
 735
 736 static struct flash_info *jedec_probe(struct spi_device *spi)
 737 {
 738         int                     tmp;
 739         uint8_t                 code = OP_READ_ID;
 740         uint8_t                 id[3];
 741         uint32_t                jedec;
 742         struct flash_info       *info;
 743         int status;
 744
 745         /* JEDEC also defines an optional "extended device information"
 746          * string for after vendor-specific data, after the three bytes
 747          * we use here.  Supporting some chips might require using it.
 748          *
 749          * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
 750          * That's not an error; only rev C and newer chips handle it, and
 751          * only Atmel sells these chips.
 752          */
 753         tmp = spi_write_then_read(spi, &code, 1, id, 3);
 754         if (tmp < 0) {
 755                 pr_debug("%s: error %d reading JEDEC ID\n",
 756                         dev_name(&spi->dev), tmp);
 757                 return ERR_PTR(tmp);
 758         }
 759         if (id[0] != 0x1f)
 760                 return NULL;
 761
 762         jedec = id[0];
 763         jedec = jedec << 8;
 764         jedec |= id[1];
 765         jedec = jedec << 8;
 766         jedec |= id[2];
 767
 768         for (tmp = 0, info = dataflash_data;
 769                         tmp < ARRAY_SIZE(dataflash_data);
 770                         tmp++, info++) {
 771                 if (info->jedec_id == jedec) {
 772                         pr_debug("%s: OTP, sector protect%s\n",
 773                                 dev_name(&spi->dev),
 774                                 (info->flags & SUP_POW2PS)
 775                                         ? ", binary pagesize" : ""
 776                                 );
 777                         if (info->flags & SUP_POW2PS) {
 778                                 status = dataflash_status(spi);
 779                                 if (status < 0) {
 780                                         pr_debug("%s: status error %d\n",
 781                                                 dev_name(&spi->dev), status);
 782                                         return ERR_PTR(status);
 783                                 }
 784                                 if (status & 0x1) {
 785                                         if (info->flags & IS_POW2PS)
 786                                                 return info;
 787                                 } else {
 788                                         if (!(info->flags & IS_POW2PS))
 789                                                 return info;
 790                                 }
 791                         } else
 792                                 return info;
 793                 }
 794         }
 795
 796         /*
 797          * Treat other chips as errors ... we won't know the right page
 798          * size (it might be binary) even when we can tell which density
 799          * class is involved (legacy chip id scheme).
 800          */
 801         dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec);
 802         return ERR_PTR(-ENODEV);
 803 }
 804
 805 /*
 806  * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
 807  * or else the ID code embedded in the status bits:
 808  *
 809  *   Device      Density         ID code          #Pages PageSize  Offset
 810  *   AT45DB011B  1Mbit   (128K)  xx0011xx (0x0c)    512    264      9
 811  *   AT45DB021B  2Mbit   (256K)  xx0101xx (0x14)   1024    264      9
 812  *   AT45DB041B  4Mbit   (512K)  xx0111xx (0x1c)   2048    264      9
 813  *   AT45DB081B  8Mbit   (1M)    xx1001xx (0x24)   4096    264      9
 814  *   AT45DB0161B 16Mbit  (2M)    xx1011xx (0x2c)   4096    528     10
 815  *   AT45DB0321B 32Mbit  (4M)    xx1101xx (0x34)   8192    528     10
 816  *   AT45DB0642  64Mbit  (8M)    xx111xxx (0x3c)   8192   1056     11
 817  *   AT45DB1282  128Mbit (16M)   xx0100xx (0x10)  16384   1056     11
 818  */
 819 static int dataflash_probe(struct spi_device *spi)
 820 {
 821         int status;
 822         struct flash_info       *info;
 823
 824         /*
 825          * Try to detect dataflash by JEDEC ID.
 826          * If it succeeds we know we have either a C or D part.
 827          * D will support power of 2 pagesize option.
 828          * Both support the security register, though with different
 829          * write procedures.
 830          */
 831         info = jedec_probe(spi);
 832         if (IS_ERR(info))
 833                 return PTR_ERR(info);
 834         if (info != NULL)
 835                 return add_dataflash_otp(spi, info->name, info->nr_pages,
 836                                 info->pagesize, info->pageoffset,
 837                                 (info->flags & SUP_POW2PS) ? 'd' : 'c');
 838
 839         /*
 840          * Older chips support only legacy commands, identifing
 841          * capacity using bits in the status byte.
 842          */
 843         status = dataflash_status(spi);
 844         if (status <= 0 || status == 0xff) {
 845                 pr_debug("%s: status error %d\n",
 846                                 dev_name(&spi->dev), status);
 847                 if (status == 0 || status == 0xff)
 848                         status = -ENODEV;
 849                 return status;
 850         }
 851
 852         /* if there's a device there, assume it's dataflash.
 853          * board setup should have set spi->max_speed_max to
 854          * match f(car) for continuous reads, mode 0 or 3.
 855          */
 856         switch (status & 0x3c) {
 857         case 0x0c:      /* 0 0 1 1 x x */
 858                 status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
 859                 break;
 860         case 0x14:      /* 0 1 0 1 x x */
 861                 status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
 862                 break;
 863         case 0x1c:      /* 0 1 1 1 x x */
 864                 status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
 865                 break;
 866         case 0x24:      /* 1 0 0 1 x x */
 867                 status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
 868                 break;
 869         case 0x2c:      /* 1 0 1 1 x x */
 870                 status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
 871                 break;
 872         case 0x34:      /* 1 1 0 1 x x */
 873                 status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
 874                 break;
 875         case 0x38:      /* 1 1 1 x x x */
 876         case 0x3c:
 877                 status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
 878                 break;
 879         /* obsolete AT45DB1282 not (yet?) supported */
 880         default:
 881                 dev_info(&spi->dev, "unsupported device (%x)\n",
 882                                 status & 0x3c);
 883                 status = -ENODEV;
 884         }
 885
 886         if (status < 0)
 887                 pr_debug("%s: add_dataflash --> %d\n", dev_name(&spi->dev),
 888                                 status);
 889
 890         return status;
 891 }
 892
 893 static int dataflash_remove(struct spi_device *spi)
 894 {
 895         struct dataflash        *flash = spi_get_drvdata(spi);
 896         int                     status;
 897
 898         pr_debug("%s: remove\n", dev_name(&spi->dev));
 899
 900         status = mtd_device_unregister(&flash->mtd);
 901         if (status == 0)
 902                 kfree(flash);
 903         return status;
 904 }
 905
 906 static struct spi_driver dataflash_driver = {
 907         .driver = {
 908                 .name           = "mtd_dataflash",
 909                 .owner          = THIS_MODULE,
 910                 .of_match_table = of_match_ptr(dataflash_dt_ids),
 911         },
 912
 913         .probe          = dataflash_probe,
 914         .remove         = dataflash_remove,
 915
 916         /* FIXME:  investigate suspend and resume... */
 917 };
 918
 919 module_spi_driver(dataflash_driver);
 920
 921 MODULE_LICENSE("GPL");
 922 MODULE_AUTHOR("Andrew Victor, David Brownell");
 923 MODULE_DESCRIPTION("MTD DataFlash driver");
 924 MODULE_ALIAS("spi:mtd_dataflash");