2 * Goramo PCI200SYN synchronous serial card driver for Linux
4 * Copyright (C) 2002-2008 Krzysztof Halasa <khc@pm.waw.pl>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License
8 * as published by the Free Software Foundation.
10 * For information see <http://www.kernel.org/pub/linux/utils/net/hdlc/>
12 * Sources of information:
13 * Hitachi HD64572 SCA-II User's Manual
14 * PLX Technology Inc. PCI9052 Data Book
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/capability.h>
22 #include <linux/slab.h>
23 #include <linux/types.h>
24 #include <linux/fcntl.h>
26 #include <linux/string.h>
27 #include <linux/errno.h>
28 #include <linux/init.h>
29 #include <linux/ioport.h>
30 #include <linux/moduleparam.h>
31 #include <linux/netdevice.h>
32 #include <linux/hdlc.h>
33 #include <linux/pci.h>
34 #include <linux/delay.h>
42 #define PCI200SYN_PLX_SIZE 0x80 /* PLX control window size (128b) */
43 #define PCI200SYN_SCA_SIZE 0x400 /* SCA window size (1Kb) */
44 #define MAX_TX_BUFFERS 10
46 static int pci_clock_freq
= 33000000;
47 #define CLOCK_BASE pci_clock_freq
50 * PLX PCI9052 local configuration and shared runtime registers.
51 * This structure can be used to access 9052 registers (memory mapped).
54 u32 loc_addr_range
[4]; /* 00-0Ch : Local Address Ranges */
55 u32 loc_rom_range
; /* 10h : Local ROM Range */
56 u32 loc_addr_base
[4]; /* 14-20h : Local Address Base Addrs */
57 u32 loc_rom_base
; /* 24h : Local ROM Base */
58 u32 loc_bus_descr
[4]; /* 28-34h : Local Bus Descriptors */
59 u32 rom_bus_descr
; /* 38h : ROM Bus Descriptor */
60 u32 cs_base
[4]; /* 3C-48h : Chip Select Base Addrs */
61 u32 intr_ctrl_stat
; /* 4Ch : Interrupt Control/Status */
62 u32 init_ctrl
; /* 50h : EEPROM ctrl, Init Ctrl, etc */
67 typedef struct port_s
{
68 struct napi_struct napi
;
69 struct net_device
*netdev
;
71 spinlock_t lock
; /* TX lock */
72 sync_serial_settings settings
;
73 int rxpart
; /* partial frame received, next frame invalid*/
74 unsigned short encoding
;
75 unsigned short parity
;
76 u16 rxin
; /* rx ring buffer 'in' pointer */
77 u16 txin
; /* tx ring buffer 'in' and 'last' pointers */
79 u8 rxs
, txs
, tmc
; /* SCA registers */
80 u8 chan
; /* physical port # - 0 or 1 */
85 typedef struct card_s
{
86 u8 __iomem
*rambase
; /* buffer memory base (virtual) */
87 u8 __iomem
*scabase
; /* SCA memory base (virtual) */
88 plx9052 __iomem
*plxbase
;/* PLX registers memory base (virtual) */
89 u16 rx_ring_buffers
; /* number of buffers in a ring */
91 u16 buff_offset
; /* offset of first buffer of first channel */
92 u8 irq
; /* interrupt request level */
98 #define get_port(card, port) (&card->ports[port])
99 #define sca_flush(card) (sca_in(IER0, card));
101 static inline void new_memcpy_toio(char __iomem
*dest
, char *src
, int length
)
105 len
= length
> 256 ? 256 : length
;
106 memcpy_toio(dest
, src
, len
);
115 #define memcpy_toio new_memcpy_toio
120 static void pci200_set_iface(port_t
*port
)
122 card_t
*card
= port
->card
;
123 u16 msci
= get_msci(port
);
124 u8 rxs
= port
->rxs
& CLK_BRG_MASK
;
125 u8 txs
= port
->txs
& CLK_BRG_MASK
;
127 sca_out(EXS_TES1
, (port
->chan
? MSCI1_OFFSET
: MSCI0_OFFSET
) + EXS
,
129 switch(port
->settings
.clock_type
) {
131 rxs
|= CLK_BRG
; /* BRG output */
132 txs
|= CLK_PIN_OUT
| CLK_TX_RXCLK
; /* RX clock */
136 rxs
|= CLK_LINE
; /* RXC input */
137 txs
|= CLK_PIN_OUT
| CLK_BRG
; /* BRG output */
141 rxs
|= CLK_LINE
; /* RXC input */
142 txs
|= CLK_PIN_OUT
| CLK_TX_RXCLK
; /* RX clock */
145 default: /* EXTernal clock */
146 rxs
|= CLK_LINE
; /* RXC input */
147 txs
|= CLK_PIN_OUT
| CLK_LINE
; /* TXC input */
153 sca_out(rxs
, msci
+ RXS
, card
);
154 sca_out(txs
, msci
+ TXS
, card
);
160 static int pci200_open(struct net_device
*dev
)
162 port_t
*port
= dev_to_port(dev
);
164 int result
= hdlc_open(dev
);
169 pci200_set_iface(port
);
170 sca_flush(port
->card
);
176 static int pci200_close(struct net_device
*dev
)
179 sca_flush(dev_to_port(dev
)->card
);
186 static int pci200_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
188 const size_t size
= sizeof(sync_serial_settings
);
189 sync_serial_settings new_line
;
190 sync_serial_settings __user
*line
= ifr
->ifr_settings
.ifs_ifsu
.sync
;
191 port_t
*port
= dev_to_port(dev
);
194 if (cmd
== SIOCDEVPRIVATE
) {
199 if (cmd
!= SIOCWANDEV
)
200 return hdlc_ioctl(dev
, ifr
, cmd
);
202 switch(ifr
->ifr_settings
.type
) {
204 ifr
->ifr_settings
.type
= IF_IFACE_V35
;
205 if (ifr
->ifr_settings
.size
< size
) {
206 ifr
->ifr_settings
.size
= size
; /* data size wanted */
209 if (copy_to_user(line
, &port
->settings
, size
))
214 case IF_IFACE_SYNC_SERIAL
:
215 if (!capable(CAP_NET_ADMIN
))
218 if (copy_from_user(&new_line
, line
, size
))
221 if (new_line
.clock_type
!= CLOCK_EXT
&&
222 new_line
.clock_type
!= CLOCK_TXFROMRX
&&
223 new_line
.clock_type
!= CLOCK_INT
&&
224 new_line
.clock_type
!= CLOCK_TXINT
)
225 return -EINVAL
; /* No such clock setting */
227 if (new_line
.loopback
!= 0 && new_line
.loopback
!= 1)
230 memcpy(&port
->settings
, &new_line
, size
); /* Update settings */
231 pci200_set_iface(port
);
232 sca_flush(port
->card
);
236 return hdlc_ioctl(dev
, ifr
, cmd
);
242 static void pci200_pci_remove_one(struct pci_dev
*pdev
)
245 card_t
*card
= pci_get_drvdata(pdev
);
247 for (i
= 0; i
< 2; i
++)
248 if (card
->ports
[i
].card
)
249 unregister_hdlc_device(card
->ports
[i
].netdev
);
252 free_irq(card
->irq
, card
);
255 iounmap(card
->rambase
);
257 iounmap(card
->scabase
);
259 iounmap(card
->plxbase
);
261 pci_release_regions(pdev
);
262 pci_disable_device(pdev
);
263 if (card
->ports
[0].netdev
)
264 free_netdev(card
->ports
[0].netdev
);
265 if (card
->ports
[1].netdev
)
266 free_netdev(card
->ports
[1].netdev
);
270 static const struct net_device_ops pci200_ops
= {
271 .ndo_open
= pci200_open
,
272 .ndo_stop
= pci200_close
,
273 .ndo_start_xmit
= hdlc_start_xmit
,
274 .ndo_do_ioctl
= pci200_ioctl
,
277 static int pci200_pci_init_one(struct pci_dev
*pdev
,
278 const struct pci_device_id
*ent
)
284 u32 ramphys
; /* buffer memory base */
285 u32 scaphys
; /* SCA memory base */
286 u32 plxphys
; /* PLX registers memory base */
288 i
= pci_enable_device(pdev
);
292 i
= pci_request_regions(pdev
, "PCI200SYN");
294 pci_disable_device(pdev
);
298 card
= kzalloc(sizeof(card_t
), GFP_KERNEL
);
300 pci_release_regions(pdev
);
301 pci_disable_device(pdev
);
304 pci_set_drvdata(pdev
, card
);
305 card
->ports
[0].netdev
= alloc_hdlcdev(&card
->ports
[0]);
306 card
->ports
[1].netdev
= alloc_hdlcdev(&card
->ports
[1]);
307 if (!card
->ports
[0].netdev
|| !card
->ports
[1].netdev
) {
308 pr_err("unable to allocate memory\n");
309 pci200_pci_remove_one(pdev
);
313 if (pci_resource_len(pdev
, 0) != PCI200SYN_PLX_SIZE
||
314 pci_resource_len(pdev
, 2) != PCI200SYN_SCA_SIZE
||
315 pci_resource_len(pdev
, 3) < 16384) {
316 pr_err("invalid card EEPROM parameters\n");
317 pci200_pci_remove_one(pdev
);
321 plxphys
= pci_resource_start(pdev
,0) & PCI_BASE_ADDRESS_MEM_MASK
;
322 card
->plxbase
= ioremap(plxphys
, PCI200SYN_PLX_SIZE
);
324 scaphys
= pci_resource_start(pdev
,2) & PCI_BASE_ADDRESS_MEM_MASK
;
325 card
->scabase
= ioremap(scaphys
, PCI200SYN_SCA_SIZE
);
327 ramphys
= pci_resource_start(pdev
,3) & PCI_BASE_ADDRESS_MEM_MASK
;
328 card
->rambase
= pci_ioremap_bar(pdev
, 3);
330 if (card
->plxbase
== NULL
||
331 card
->scabase
== NULL
||
332 card
->rambase
== NULL
) {
333 pr_err("ioremap() failed\n");
334 pci200_pci_remove_one(pdev
);
339 p
= &card
->plxbase
->init_ctrl
;
340 writel(readl(p
) | 0x40000000, p
);
341 readl(p
); /* Flush the write - do not use sca_flush */
344 writel(readl(p
) & ~0x40000000, p
);
345 readl(p
); /* Flush the write - do not use sca_flush */
348 ramsize
= sca_detect_ram(card
, card
->rambase
,
349 pci_resource_len(pdev
, 3));
351 /* number of TX + RX buffers for one port - this is dual port card */
352 i
= ramsize
/ (2 * (sizeof(pkt_desc
) + HDLC_MAX_MRU
));
353 card
->tx_ring_buffers
= min(i
/ 2, MAX_TX_BUFFERS
);
354 card
->rx_ring_buffers
= i
- card
->tx_ring_buffers
;
356 card
->buff_offset
= 2 * sizeof(pkt_desc
) * (card
->tx_ring_buffers
+
357 card
->rx_ring_buffers
);
359 pr_info("%u KB RAM at 0x%x, IRQ%u, using %u TX + %u RX packets rings\n",
360 ramsize
/ 1024, ramphys
,
361 pdev
->irq
, card
->tx_ring_buffers
, card
->rx_ring_buffers
);
363 if (card
->tx_ring_buffers
< 1) {
364 pr_err("RAM test failed\n");
365 pci200_pci_remove_one(pdev
);
369 /* Enable interrupts on the PCI bridge */
370 p
= &card
->plxbase
->intr_ctrl_stat
;
371 writew(readw(p
) | 0x0040, p
);
374 if (request_irq(pdev
->irq
, sca_intr
, IRQF_SHARED
, "pci200syn", card
)) {
375 pr_warn("could not allocate IRQ%d\n", pdev
->irq
);
376 pci200_pci_remove_one(pdev
);
379 card
->irq
= pdev
->irq
;
383 for (i
= 0; i
< 2; i
++) {
384 port_t
*port
= &card
->ports
[i
];
385 struct net_device
*dev
= port
->netdev
;
386 hdlc_device
*hdlc
= dev_to_hdlc(dev
);
389 spin_lock_init(&port
->lock
);
390 dev
->irq
= card
->irq
;
391 dev
->mem_start
= ramphys
;
392 dev
->mem_end
= ramphys
+ ramsize
- 1;
393 dev
->tx_queue_len
= 50;
394 dev
->netdev_ops
= &pci200_ops
;
395 hdlc
->attach
= sca_attach
;
396 hdlc
->xmit
= sca_xmit
;
397 port
->settings
.clock_type
= CLOCK_EXT
;
400 if (register_hdlc_device(dev
)) {
401 pr_err("unable to register hdlc device\n");
403 pci200_pci_remove_one(pdev
);
407 netdev_info(dev
, "PCI200SYN channel %d\n", port
->chan
);
416 static const struct pci_device_id pci200_pci_tbl
[] = {
417 { PCI_VENDOR_ID_PLX
, PCI_DEVICE_ID_PLX_9050
, PCI_VENDOR_ID_PLX
,
418 PCI_DEVICE_ID_PLX_PCI200SYN
, 0, 0, 0 },
423 static struct pci_driver pci200_pci_driver
= {
425 .id_table
= pci200_pci_tbl
,
426 .probe
= pci200_pci_init_one
,
427 .remove
= pci200_pci_remove_one
,
431 static int __init
pci200_init_module(void)
433 if (pci_clock_freq
< 1000000 || pci_clock_freq
> 80000000) {
434 pr_err("Invalid PCI clock frequency\n");
437 return pci_register_driver(&pci200_pci_driver
);
442 static void __exit
pci200_cleanup_module(void)
444 pci_unregister_driver(&pci200_pci_driver
);
447 MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
448 MODULE_DESCRIPTION("Goramo PCI200SYN serial port driver");
449 MODULE_LICENSE("GPL v2");
450 MODULE_DEVICE_TABLE(pci
, pci200_pci_tbl
);
451 module_param(pci_clock_freq
, int, 0444);
452 MODULE_PARM_DESC(pci_clock_freq
, "System PCI clock frequency in Hz");
453 module_init(pci200_init_module
);
454 module_exit(pci200_cleanup_module
);