1 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
2 ; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
3 ; RUN: FileCheck %s --check-prefix=CHECK-P8
4 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
5 ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
6 ; RUN: FileCheck %s --check-prefix=CHECK-P9
7 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
8 ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
9 ; RUN: FileCheck %s --check-prefix=CHECK-BE
11 define void @test8(<8 x double>* nocapture %Sink, <8 x i16>* nocapture readonly %SrcPtr) {
13 %0 = load <8 x i16>, <8 x i16>* %SrcPtr, align 16
14 %1 = uitofp <8 x i16> %0 to <8 x double>
15 store <8 x double> %1, <8 x double>* %Sink, align 16
17 ; CHECK-P9-LABEL: @test8
26 ; CHECK-P8-LABEL: @test8
37 define void @test4(<4 x double>* nocapture %Sink, <4 x i16>* nocapture readonly %SrcPtr) {
39 %0 = load <4 x i16>, <4 x i16>* %SrcPtr, align 16
40 %1 = uitofp <4 x i16> %0 to <4 x double>
41 store <4 x double> %1, <4 x double>* %Sink, align 16
43 ; CHECK-P9-LABEL: @test4
48 ; CHECK-P8-LABEL: @test4
55 define void @test2(<2 x double>* nocapture %Sink, <2 x i16>* nocapture readonly %SrcPtr) {
57 %0 = load <2 x i16>, <2 x i16>* %SrcPtr, align 16
58 %1 = uitofp <2 x i16> %0 to <2 x double>
59 store <2 x double> %1, <2 x double>* %Sink, align 16
61 ; CHECK-P9-LABEL: .LCPI2_0:
62 ; CHECK-P9-NEXT: .byte 31
63 ; CHECK-P9-NEXT: .byte 30
64 ; CHECK-P9-NEXT: .byte 13
65 ; CHECK-P9-NEXT: .byte 12
66 ; CHECK-P9-NEXT: .byte 11
67 ; CHECK-P9-NEXT: .byte 10
68 ; CHECK-P9-NEXT: .byte 9
69 ; CHECK-P9-NEXT: .byte 8
70 ; CHECK-P9-NEXT: .byte 29
71 ; CHECK-P9-NEXT: .byte 28
72 ; CHECK-P9-NEXT: .byte 5
73 ; CHECK-P9-NEXT: .byte 4
74 ; CHECK-P9-NEXT: .byte 3
75 ; CHECK-P9-NEXT: .byte 2
76 ; CHECK-P9-NEXT: .byte 1
77 ; CHECK-P9-NEXT: .byte 0
78 ; CHECK-P9: addi [[REG1:r[0-9]+]], {{r[0-9]+}}, .LCPI2_0@toc@l
79 ; CHECK-P9: lxvx [[REG2:v[0-9]+]], 0, [[REG1]]
80 ; CHECK-P9: vperm [[REG3:v[0-9]+]], {{v[0-9]+}}, {{v[0-9]+}}, [[REG2]]
81 ; CHECK-P9: xvcvuxddp {{vs[0-9]+}}, [[REG3]]
82 ; CHECK-P8-LABEL: @test2
83 ; CHECK-P8: vperm [[REG1:v[0-9]+]]
84 ; CHECK-P8: xvcvuxddp {{vs[0-9]+}}, [[REG1]]
85 ; CHECK-BE-LABEL: .LCPI2_0:
86 ; CHECK-BE-NEXT: .byte 16
87 ; CHECK-BE-NEXT: .byte 17
88 ; CHECK-BE-NEXT: .byte 18
89 ; CHECK-BE-NEXT: .byte 19
90 ; CHECK-BE-NEXT: .byte 20
91 ; CHECK-BE-NEXT: .byte 21
92 ; CHECK-BE-NEXT: .byte 0
93 ; CHECK-BE-NEXT: .byte 1
94 ; CHECK-BE-NEXT: .byte 24
95 ; CHECK-BE-NEXT: .byte 25
96 ; CHECK-BE-NEXT: .byte 26
97 ; CHECK-BE-NEXT: .byte 27
98 ; CHECK-BE-NEXT: .byte 28
99 ; CHECK-BE-NEXT: .byte 29
100 ; CHECK-BE-NEXT: .byte 2
101 ; CHECK-BE-NEXT: .byte 3
102 ; CHECK-BE: addi [[REG1:r[0-9]+]], {{r[0-9]+}}, .LCPI2_0@toc@l
103 ; CHECK-BE: lxvx [[REG2:v[0-9]+]], 0, [[REG1]]
104 ; CHECK-BE: vperm [[REG3:v[0-9]+]], {{v[0-9]+}}, {{v[0-9]+}}, [[REG2]]
105 ; CHECK-BE: xvcvuxddp {{vs[0-9]+}}, [[REG3]]
108 define void @stest8(<8 x double>* nocapture %Sink, <8 x i16>* nocapture readonly %SrcPtr) {
110 %0 = load <8 x i16>, <8 x i16>* %SrcPtr, align 16
111 %1 = sitofp <8 x i16> %0 to <8 x double>
112 store <8 x double> %1, <8 x double>* %Sink, align 16
114 ; CHECK-P9-LABEL: @stest8
117 ; CHECK-P9: xvcvsxddp
120 ; CHECK-P9: xvcvsxddp
123 ; CHECK-P9: xvcvsxddp
126 ; CHECK-P9: xvcvsxddp
129 define void @stest4(<4 x double>* nocapture %Sink, <4 x i16>* nocapture readonly %SrcPtr) {
131 %0 = load <4 x i16>, <4 x i16>* %SrcPtr, align 16
132 %1 = sitofp <4 x i16> %0 to <4 x double>
133 store <4 x double> %1, <4 x double>* %Sink, align 16
135 ; CHECK-P9-LABEL: @stest4
138 ; CHECK-P9: xvcvsxddp
141 ; CHECK-P9: xvcvsxddp
144 define void @stest2(<2 x double>* nocapture %Sink, <2 x i16>* nocapture readonly %SrcPtr) {
146 %0 = load <2 x i16>, <2 x i16>* %SrcPtr, align 16
147 %1 = sitofp <2 x i16> %0 to <2 x double>
148 store <2 x double> %1, <2 x double>* %Sink, align 16
150 ; CHECK-P9-LABEL: .LCPI5_0:
151 ; CHECK-P9-NEXT: .byte 31
152 ; CHECK-P9-NEXT: .byte 30
153 ; CHECK-P9-NEXT: .byte 31
154 ; CHECK-P9-NEXT: .byte 31
155 ; CHECK-P9-NEXT: .byte 31
156 ; CHECK-P9-NEXT: .byte 31
157 ; CHECK-P9-NEXT: .byte 31
158 ; CHECK-P9-NEXT: .byte 31
159 ; CHECK-P9-NEXT: .byte 29
160 ; CHECK-P9-NEXT: .byte 28
161 ; CHECK-P9-NEXT: .byte 31
162 ; CHECK-P9-NEXT: .byte 31
163 ; CHECK-P9-NEXT: .byte 31
164 ; CHECK-P9-NEXT: .byte 31
165 ; CHECK-P9-NEXT: .byte 31
166 ; CHECK-P9-NEXT: .byte 31
167 ; CHECK-P9: vperm [[REG1:v[0-9]+]]
168 ; CHECK-P9: vextsh2d [[REG2:v[0-9]+]], [[REG1]]
169 ; CHECK-P9: xvcvsxddp {{vs[0-9]+}}, [[REG2]]
170 ; CHECK-BE-LABEL: .LCPI5_0:
171 ; CHECK-BE-NEXT: .byte 0
172 ; CHECK-BE-NEXT: .byte 0
173 ; CHECK-BE-NEXT: .byte 0
174 ; CHECK-BE-NEXT: .byte 0
175 ; CHECK-BE-NEXT: .byte 0
176 ; CHECK-BE-NEXT: .byte 0
177 ; CHECK-BE-NEXT: .byte 0
178 ; CHECK-BE-NEXT: .byte 1
179 ; CHECK-BE-NEXT: .byte 0
180 ; CHECK-BE-NEXT: .byte 0
181 ; CHECK-BE-NEXT: .byte 0
182 ; CHECK-BE-NEXT: .byte 0
183 ; CHECK-BE-NEXT: .byte 0
184 ; CHECK-BE-NEXT: .byte 0
185 ; CHECK-BE-NEXT: .byte 2
186 ; CHECK-BE-NEXT: .byte 3
187 ; CHECK-BE: addi [[REG1:r[0-9]+]], {{r[0-9]+}}, .LCPI5_0@toc@l
188 ; CHECK-BE: lxvx [[REG2:v[0-9]+]], 0, [[REG1]]
189 ; CHECK-BE: vperm [[REG3:v[0-9]+]], {{v[0-9]+}}, {{v[0-9]+}}, [[REG2]]
190 ; CHECK-BE: vextsh2d [[REG4:v[0-9]+]], [[REG3]]
191 ; CHECK-BE: xvcvsxddp {{vs[0-9]+}}, [[REG4]]