Revert r354244 "[DAGCombiner] Eliminate dead stores to stack."
[llvm-complete.git] / lib / Target / BPF / MCTargetDesc / BPFMCCodeEmitter.cpp
blob947095b8da7cd2b38c1dd85cf6408f26268cd6d5
1 //===-- BPFMCCodeEmitter.cpp - Convert BPF code to machine code -----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the BPFMCCodeEmitter class.
11 //===----------------------------------------------------------------------===//
13 #include "MCTargetDesc/BPFMCTargetDesc.h"
14 #include "llvm/ADT/SmallVector.h"
15 #include "llvm/MC/MCCodeEmitter.h"
16 #include "llvm/MC/MCFixup.h"
17 #include "llvm/MC/MCInst.h"
18 #include "llvm/MC/MCInstrInfo.h"
19 #include "llvm/MC/MCRegisterInfo.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/Support/Endian.h"
22 #include "llvm/Support/EndianStream.h"
23 #include <cassert>
24 #include <cstdint>
26 using namespace llvm;
28 #define DEBUG_TYPE "mccodeemitter"
30 namespace {
32 class BPFMCCodeEmitter : public MCCodeEmitter {
33 const MCInstrInfo &MCII;
34 const MCRegisterInfo &MRI;
35 bool IsLittleEndian;
37 public:
38 BPFMCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri,
39 bool IsLittleEndian)
40 : MCII(mcii), MRI(mri), IsLittleEndian(IsLittleEndian) {}
41 BPFMCCodeEmitter(const BPFMCCodeEmitter &) = delete;
42 void operator=(const BPFMCCodeEmitter &) = delete;
43 ~BPFMCCodeEmitter() override = default;
45 // getBinaryCodeForInstr - TableGen'erated function for getting the
46 // binary encoding for an instruction.
47 uint64_t getBinaryCodeForInstr(const MCInst &MI,
48 SmallVectorImpl<MCFixup> &Fixups,
49 const MCSubtargetInfo &STI) const;
51 // getMachineOpValue - Return binary encoding of operand. If the machin
52 // operand requires relocation, record the relocation and return zero.
53 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
54 SmallVectorImpl<MCFixup> &Fixups,
55 const MCSubtargetInfo &STI) const;
57 uint64_t getMemoryOpValue(const MCInst &MI, unsigned Op,
58 SmallVectorImpl<MCFixup> &Fixups,
59 const MCSubtargetInfo &STI) const;
61 void encodeInstruction(const MCInst &MI, raw_ostream &OS,
62 SmallVectorImpl<MCFixup> &Fixups,
63 const MCSubtargetInfo &STI) const override;
65 private:
66 uint64_t computeAvailableFeatures(const FeatureBitset &FB) const;
67 void verifyInstructionPredicates(const MCInst &MI,
68 uint64_t AvailableFeatures) const;
71 } // end anonymous namespace
73 MCCodeEmitter *llvm::createBPFMCCodeEmitter(const MCInstrInfo &MCII,
74 const MCRegisterInfo &MRI,
75 MCContext &Ctx) {
76 return new BPFMCCodeEmitter(MCII, MRI, true);
79 MCCodeEmitter *llvm::createBPFbeMCCodeEmitter(const MCInstrInfo &MCII,
80 const MCRegisterInfo &MRI,
81 MCContext &Ctx) {
82 return new BPFMCCodeEmitter(MCII, MRI, false);
85 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI,
86 const MCOperand &MO,
87 SmallVectorImpl<MCFixup> &Fixups,
88 const MCSubtargetInfo &STI) const {
89 if (MO.isReg())
90 return MRI.getEncodingValue(MO.getReg());
91 if (MO.isImm())
92 return static_cast<unsigned>(MO.getImm());
94 assert(MO.isExpr());
96 const MCExpr *Expr = MO.getExpr();
98 assert(Expr->getKind() == MCExpr::SymbolRef);
100 if (MI.getOpcode() == BPF::JAL)
101 // func call name
102 Fixups.push_back(MCFixup::create(0, Expr, FK_PCRel_4));
103 else if (MI.getOpcode() == BPF::LD_imm64)
104 Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_8));
105 else
106 // bb label
107 Fixups.push_back(MCFixup::create(0, Expr, FK_PCRel_2));
109 return 0;
112 static uint8_t SwapBits(uint8_t Val)
114 return (Val & 0x0F) << 4 | (Val & 0xF0) >> 4;
117 void BPFMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
118 SmallVectorImpl<MCFixup> &Fixups,
119 const MCSubtargetInfo &STI) const {
120 verifyInstructionPredicates(MI,
121 computeAvailableFeatures(STI.getFeatureBits()));
123 unsigned Opcode = MI.getOpcode();
124 support::endian::Writer OSE(OS,
125 IsLittleEndian ? support::little : support::big);
127 if (Opcode == BPF::LD_imm64 || Opcode == BPF::LD_pseudo) {
128 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
129 OS << char(Value >> 56);
130 if (IsLittleEndian)
131 OS << char((Value >> 48) & 0xff);
132 else
133 OS << char(SwapBits((Value >> 48) & 0xff));
134 OSE.write<uint16_t>(0);
135 OSE.write<uint32_t>(Value & 0xffffFFFF);
137 const MCOperand &MO = MI.getOperand(1);
138 uint64_t Imm = MO.isImm() ? MO.getImm() : 0;
139 OSE.write<uint8_t>(0);
140 OSE.write<uint8_t>(0);
141 OSE.write<uint16_t>(0);
142 OSE.write<uint32_t>(Imm >> 32);
143 } else {
144 // Get instruction encoding and emit it
145 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
146 OS << char(Value >> 56);
147 if (IsLittleEndian)
148 OS << char((Value >> 48) & 0xff);
149 else
150 OS << char(SwapBits((Value >> 48) & 0xff));
151 OSE.write<uint16_t>((Value >> 32) & 0xffff);
152 OSE.write<uint32_t>(Value & 0xffffFFFF);
156 // Encode BPF Memory Operand
157 uint64_t BPFMCCodeEmitter::getMemoryOpValue(const MCInst &MI, unsigned Op,
158 SmallVectorImpl<MCFixup> &Fixups,
159 const MCSubtargetInfo &STI) const {
160 uint64_t Encoding;
161 const MCOperand Op1 = MI.getOperand(1);
162 assert(Op1.isReg() && "First operand is not register.");
163 Encoding = MRI.getEncodingValue(Op1.getReg());
164 Encoding <<= 16;
165 MCOperand Op2 = MI.getOperand(2);
166 assert(Op2.isImm() && "Second operand is not immediate.");
167 Encoding |= Op2.getImm() & 0xffff;
168 return Encoding;
171 #define ENABLE_INSTR_PREDICATE_VERIFIER
172 #include "BPFGenMCCodeEmitter.inc"