[DAGCombiner] Eliminate dead stores to stack.
[llvm-complete.git] / lib / Target / RISCV / RISCVSubtarget.h
blob66c77301037a2afcbe218ee5e58fe43976176aed
1 //===-- RISCVSubtarget.h - Define Subtarget for the RISCV -------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the RISCV specific subclass of TargetSubtargetInfo.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H
14 #define LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H
16 #include "RISCVFrameLowering.h"
17 #include "RISCVISelLowering.h"
18 #include "RISCVInstrInfo.h"
19 #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
20 #include "llvm/CodeGen/TargetSubtargetInfo.h"
21 #include "llvm/IR/DataLayout.h"
22 #include "llvm/Target/TargetMachine.h"
24 #define GET_SUBTARGETINFO_HEADER
25 #include "RISCVGenSubtargetInfo.inc"
27 namespace llvm {
28 class StringRef;
30 class RISCVSubtarget : public RISCVGenSubtargetInfo {
31 virtual void anchor();
32 bool HasStdExtM = false;
33 bool HasStdExtA = false;
34 bool HasStdExtF = false;
35 bool HasStdExtD = false;
36 bool HasStdExtC = false;
37 bool HasRV64 = false;
38 bool EnableLinkerRelax = false;
39 unsigned XLen = 32;
40 MVT XLenVT = MVT::i32;
41 RISCVFrameLowering FrameLowering;
42 RISCVInstrInfo InstrInfo;
43 RISCVRegisterInfo RegInfo;
44 RISCVTargetLowering TLInfo;
45 SelectionDAGTargetInfo TSInfo;
47 /// Initializes using the passed in CPU and feature strings so that we can
48 /// use initializer lists for subtarget initialization.
49 RISCVSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS,
50 bool Is64Bit);
52 public:
53 // Initializes the data members to match that of the specified triple.
54 RISCVSubtarget(const Triple &TT, const std::string &CPU,
55 const std::string &FS, const TargetMachine &TM);
57 // Parses features string setting specified subtarget options. The
58 // definition of this function is auto-generated by tblgen.
59 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
61 const RISCVFrameLowering *getFrameLowering() const override {
62 return &FrameLowering;
64 const RISCVInstrInfo *getInstrInfo() const override { return &InstrInfo; }
65 const RISCVRegisterInfo *getRegisterInfo() const override {
66 return &RegInfo;
68 const RISCVTargetLowering *getTargetLowering() const override {
69 return &TLInfo;
71 const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
72 return &TSInfo;
74 bool hasStdExtM() const { return HasStdExtM; }
75 bool hasStdExtA() const { return HasStdExtA; }
76 bool hasStdExtF() const { return HasStdExtF; }
77 bool hasStdExtD() const { return HasStdExtD; }
78 bool hasStdExtC() const { return HasStdExtC; }
79 bool is64Bit() const { return HasRV64; }
80 bool enableLinkerRelax() const { return EnableLinkerRelax; }
81 MVT getXLenVT() const { return XLenVT; }
82 unsigned getXLen() const { return XLen; }
84 } // End llvm namespace
86 #endif