lib/CodeGen/GlobalISel/RegisterBank.cpp

   1 //===- llvm/CodeGen/GlobalISel/RegisterBank.cpp - Register Bank --*- C++ -*-==//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 /// \file
   9 /// This file implements the RegisterBank class.
  10 //===----------------------------------------------------------------------===//
  11
  12 #include "llvm/CodeGen/GlobalISel/RegisterBank.h"
  13 #include "llvm/CodeGen/TargetRegisterInfo.h"
  14 #include "llvm/Config/llvm-config.h"
  15 #include "llvm/Support/Debug.h"
  16
  17 #define DEBUG_TYPE "registerbank"
  18
  19 using namespace llvm;
  20
  21 const unsigned RegisterBank::InvalidID = UINT_MAX;
  22
  23 RegisterBank::RegisterBank(
  24     unsigned ID, const char *Name, unsigned Size,
  25     const uint32_t *CoveredClasses, unsigned NumRegClasses)
  26     : ID(ID), Name(Name), Size(Size) {
  27   ContainedRegClasses.resize(NumRegClasses);
  28   ContainedRegClasses.setBitsInMask(CoveredClasses);
  29 }
  30
  31 bool RegisterBank::verify(const TargetRegisterInfo &TRI) const {
  32   assert(isValid() && "Invalid register bank");
  33   for (unsigned RCId = 0, End = TRI.getNumRegClasses(); RCId != End; ++RCId) {
  34     const TargetRegisterClass &RC = *TRI.getRegClass(RCId);
  35
  36     if (!covers(RC))
  37       continue;
  38     // Verify that the register bank covers all the sub classes of the
  39     // classes it covers.
  40
  41     // Use a different (slow in that case) method than
  42     // RegisterBankInfo to find the subclasses of RC, to make sure
  43     // both agree on the covers.
  44     for (unsigned SubRCId = 0; SubRCId != End; ++SubRCId) {
  45       const TargetRegisterClass &SubRC = *TRI.getRegClass(RCId);
  46
  47       if (!RC.hasSubClassEq(&SubRC))
  48         continue;
  49
  50       // Verify that the Size of the register bank is big enough to cover
  51       // all the register classes it covers.
  52       assert(getSize() >= TRI.getRegSizeInBits(SubRC) &&
  53              "Size is not big enough for all the subclasses!");
  54       assert(covers(SubRC) && "Not all subclasses are covered");
  55     }
  56   }
  57   return true;
  58 }
  59
  60 bool RegisterBank::covers(const TargetRegisterClass &RC) const {
  61   assert(isValid() && "RB hasn't been initialized yet");
  62   return ContainedRegClasses.test(RC.getID());
  63 }
  64
  65 bool RegisterBank::isValid() const {
  66   return ID != InvalidID && Name != nullptr && Size != 0 &&
  67          // A register bank that does not cover anything is useless.
  68          !ContainedRegClasses.empty();
  69 }
  70
  71 bool RegisterBank::operator==(const RegisterBank &OtherRB) const {
  72   // There must be only one instance of a given register bank alive
  73   // for the whole compilation.
  74   // The RegisterBankInfo is supposed to enforce that.
  75   assert((OtherRB.getID() != getID() || &OtherRB == this) &&
  76          "ID does not uniquely identify a RegisterBank");
  77   return &OtherRB == this;
  78 }
  79
  80 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
  81 LLVM_DUMP_METHOD void RegisterBank::dump(const TargetRegisterInfo *TRI) const {
  82   print(dbgs(), /* IsForDebug */ true, TRI);
  83 }
  84 #endif
  85
  86 void RegisterBank::print(raw_ostream &OS, bool IsForDebug,
  87                          const TargetRegisterInfo *TRI) const {
  88   OS << getName();
  89   if (!IsForDebug)
  90     return;
  91   OS << "(ID:" << getID() << ", Size:" << getSize() << ")\n"
  92      << "isValid:" << isValid() << '\n'
  93      << "Number of Covered register classes: " << ContainedRegClasses.count()
  94      << '\n';
  95   // Print all the subclasses if we can.
  96   // This register classes may not be properly initialized yet.
  97   if (!TRI || ContainedRegClasses.empty())
  98     return;
  99   assert(ContainedRegClasses.size() == TRI->getNumRegClasses() &&
 100          "TRI does not match the initialization process?");
 101   bool IsFirst = true;
 102   OS << "Covered register classes:\n";
 103   for (unsigned RCId = 0, End = TRI->getNumRegClasses(); RCId != End; ++RCId) {
 104     const TargetRegisterClass &RC = *TRI->getRegClass(RCId);
 105
 106     if (!covers(RC))
 107       continue;
 108
 109     if (!IsFirst)
 110       OS << ", ";
 111     OS << TRI->getRegClassName(&RC);
 112     IsFirst = false;
 113   }
 114 }