1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -march=aarch64 -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
4 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
5 target triple = "aarch64"
7 define void @test_ms1(i8* nocapture %dst, i32 %c, i32 %len) local_unnamed_addr #0 {
9 %0 = trunc i32 %c to i8
10 %conv = zext i32 %len to i64
11 tail call void @llvm.memset.p0i8.i64(i8* align 1 %dst, i8 %0, i64 %conv, i1 false)
15 declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1 immarg) #1
17 define void @test_ms2_const(i8* nocapture %dst, i32 %c) local_unnamed_addr #0 {
19 %0 = trunc i32 %c to i8
20 tail call void @llvm.memset.p0i8.i64(i8* align 1 %dst, i8 %0, i64 16, i1 false)
24 define void @test_ms3_const_both(i8* nocapture %dst) local_unnamed_addr #0 {
26 tail call void @llvm.memset.p0i8.i64(i8* align 1 %dst, i8 64, i64 16, i1 false)
30 define void @test_ms4_const_both_unaligned(i8* nocapture %dst) local_unnamed_addr #0 {
32 tail call void @llvm.memset.p0i8.i64(i8* align 1 %dst, i8 64, i64 18, i1 false)
36 declare void @llvm.stackprotector(i8*, i8**) #2
38 attributes #0 = { nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cyclone" "target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm,+zcz" "unsafe-fp-math"="false" "use-soft-float"="false" }
39 attributes #1 = { argmemonly nounwind }
45 tracksRegLiveness: true
48 liveins: $w1, $w2, $x0
50 ; CHECK-LABEL: name: test_ms1
51 ; CHECK: liveins: $w1, $w2, $x0
52 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
53 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
54 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2
55 ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
56 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY2]](s32)
57 ; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.memset), [[COPY]](p0), [[TRUNC]](s8), [[ZEXT]](s64), 1 :: (store 1 into %ir.dst)
62 %3:_(s8) = G_TRUNC %1(s32)
63 %4:_(s64) = G_ZEXT %2(s32)
64 G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.memset), %0(p0), %3(s8), %4(s64), 1 :: (store 1 into %ir.dst)
71 tracksRegLiveness: true
76 ; CHECK-LABEL: name: test_ms2_const
77 ; CHECK: liveins: $w1, $x0
78 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
79 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
80 ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
81 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC]](s8)
82 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 72340172838076673
83 ; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[ZEXT]], [[C]]
84 ; CHECK: G_STORE [[MUL]](s64), [[COPY]](p0) :: (store 8 into %ir.dst, align 1)
85 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
86 ; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C1]](s64)
87 ; CHECK: G_STORE [[MUL]](s64), [[GEP]](p0) :: (store 8 into %ir.dst + 8, align 1)
91 %3:_(s64) = G_CONSTANT i64 16
92 %2:_(s8) = G_TRUNC %1(s32)
93 G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.memset), %0(p0), %2(s8), %3(s64), 1 :: (store 1 into %ir.dst)
98 name: test_ms3_const_both
100 tracksRegLiveness: true
105 ; CHECK-LABEL: name: test_ms3_const_both
106 ; CHECK: liveins: $x0
107 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
108 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4629771061636907072
109 ; CHECK: G_STORE [[C]](s64), [[COPY]](p0) :: (store 8 into %ir.dst, align 1)
110 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
111 ; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C1]](s64)
112 ; CHECK: G_STORE [[C]](s64), [[GEP]](p0) :: (store 8 into %ir.dst + 8, align 1)
113 ; CHECK: RET_ReallyLR
115 %1:_(s8) = G_CONSTANT i8 64
116 %2:_(s64) = G_CONSTANT i64 16
117 G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.memset), %0(p0), %1(s8), %2(s64), 1 :: (store 1 into %ir.dst)
122 name: test_ms4_const_both_unaligned
124 tracksRegLiveness: true
129 ; CHECK-LABEL: name: test_ms4_const_both_unaligned
130 ; CHECK: liveins: $x0
131 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
132 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4629771061636907072
133 ; CHECK: G_STORE [[C]](s64), [[COPY]](p0) :: (store 8 into %ir.dst, align 1)
134 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
135 ; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C1]](s64)
136 ; CHECK: G_STORE [[C]](s64), [[GEP]](p0) :: (store 8 into %ir.dst + 8, align 1)
137 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s64)
138 ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
139 ; CHECK: [[GEP1:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C2]](s64)
140 ; CHECK: G_STORE [[TRUNC]](s16), [[GEP1]](p0) :: (store 2 into %ir.dst + 16, align 1)
141 ; CHECK: RET_ReallyLR
143 %1:_(s8) = G_CONSTANT i8 64
144 %2:_(s64) = G_CONSTANT i64 18
145 G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.memset), %0(p0), %1(s8), %2(s64), 1 :: (store 1 into %ir.dst)