[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / test / CodeGen / AArch64 / GlobalISel / prelegalizercombiner-copy-prop-disabled.mir
blobbd6756aa40a769ae1264519d04f8d841839bafaa
1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -run-pass=aarch64-prelegalizer-combiner -global-isel -verify-machineinstrs %s -o - \
3 # RUN:                                                                | FileCheck --check-prefix=ENABLED %s
4 # RUN: llc -run-pass=aarch64-prelegalizer-combiner -global-isel -verify-machineinstrs %s -o - \
5 # RUN:     --aarch64prelegalizercombinerhelper-disable-rule=copy_prop | FileCheck --check-prefix=DISABLED %s
7 # REQUIRES: asserts
9 --- |
10   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
11   target triple = "aarch64--"
12   define void @test_copy(i8* %addr) {
13   entry:
14     ret void
15   }
16 ...
18 ---
19 name:            test_copy
20 body: |
21   bb.0.entry:
22     liveins: $x0
23     ; ENABLED-LABEL: name: test_copy
24     ; ENABLED: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
25     ; ENABLED: $x0 = COPY [[COPY]](p0)
26     ; DISABLED-LABEL: name: test_copy
27     ; DISABLED: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
28     ; DISABLED: [[COPY1:%[0-9]+]]:_(p0) = COPY [[COPY]](p0)
29     ; DISABLED: [[COPY2:%[0-9]+]]:_(p0) = COPY [[COPY1]](p0)
30     ; DISABLED: $x0 = COPY [[COPY2]](p0)
31     %0:_(p0) = COPY $x0
32     %1:_(p0) = COPY %0
33     %2:_(p0) = COPY %1
34     $x0 = COPY %2
35 ...