1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
5 define void @test_load_acquire_i8(i8* %addr) { ret void }
6 define void @test_load_acquire_i16(i16* %addr) { ret void }
7 define void @test_load_acquire_i32(i32* %addr) { ret void }
8 define void @test_load_acquire_i64(i64* %addr) { ret void }
12 name: test_load_acquire_i8
16 tracksRegLiveness: true
20 ; CHECK-LABEL: name: test_load_acquire_i8
22 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
23 ; CHECK: [[LDAXRB:%[0-9]+]]:gpr32 = LDAXRB [[COPY]] :: (volatile load 1 from %ir.addr)
24 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDAXRB]], %subreg.sub_32
25 ; CHECK: $x1 = COPY [[SUBREG_TO_REG]]
26 ; CHECK: RET_ReallyLR implicit $x1
28 %1:gpr(s64) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.ldaxr), %0(p0) :: (volatile load 1 from %ir.addr)
30 RET_ReallyLR implicit $x1
34 name: test_load_acquire_i16
38 tracksRegLiveness: true
42 ; CHECK-LABEL: name: test_load_acquire_i16
44 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
45 ; CHECK: [[LDAXRH:%[0-9]+]]:gpr32 = LDAXRH [[COPY]] :: (volatile load 2 from %ir.addr)
46 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDAXRH]], %subreg.sub_32
47 ; CHECK: $x1 = COPY [[SUBREG_TO_REG]]
48 ; CHECK: RET_ReallyLR implicit $x1
50 %1:gpr(s64) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.ldaxr), %0(p0) :: (volatile load 2 from %ir.addr)
52 RET_ReallyLR implicit $x1
56 name: test_load_acquire_i32
60 tracksRegLiveness: true
64 ; CHECK-LABEL: name: test_load_acquire_i32
66 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
67 ; CHECK: [[LDAXRW:%[0-9]+]]:gpr32 = LDAXRW [[COPY]] :: (volatile load 4 from %ir.addr)
68 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[LDAXRW]], %subreg.sub_32
69 ; CHECK: $x1 = COPY [[SUBREG_TO_REG]]
70 ; CHECK: RET_ReallyLR implicit $x1
72 %1:gpr(s64) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.ldaxr), %0(p0) :: (volatile load 4 from %ir.addr)
74 RET_ReallyLR implicit $x1
78 name: test_load_acquire_i64
82 tracksRegLiveness: true
86 ; CHECK-LABEL: name: test_load_acquire_i64
87 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
88 ; CHECK: [[LDAXRX:%[0-9]+]]:gpr64 = LDAXRX [[COPY]] :: (volatile load 8 from %ir.addr)
89 ; CHECK: $x1 = COPY [[LDAXRX]]
90 ; CHECK: RET_ReallyLR implicit $x1
92 %1:gpr(s64) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.ldaxr), %0(p0) :: (volatile load 8 from %ir.addr)
94 RET_ReallyLR implicit $x1