1 ; RUN: llc -mtriple=arm64-linux-gnuabi < %s | FileCheck %s
3 ; The following tests is to check the correctness of reversing input operand
4 ; of vext by enumerating all cases of using two undefs in shuffle masks.
6 define <4 x i16> @vext_6701_0(<4 x i16> %a1, <4 x i16> %a2) {
8 ; CHECK-LABEL: vext_6701_0:
9 ; CHECK: ext v0.8b, v1.8b, v0.8b, #4
10 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
14 define <4 x i16> @vext_6701_12(<4 x i16> %a1, <4 x i16> %a2) {
16 ; CHECK-LABEL: vext_6701_12:
17 ; CHECK: ext v0.8b, v0.8b, v0.8b, #4
18 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1>
22 define <4 x i16> @vext_6701_13(<4 x i16> %a1, <4 x i16> %a2) {
24 ; CHECK-LABEL: vext_6701_13:
25 ; CHECK: ext v0.8b, v1.8b, v0.8b, #4
26 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 7, i32 undef, i32 1>
30 define <4 x i16> @vext_6701_14(<4 x i16> %a1, <4 x i16> %a2) {
32 ; CHECK-LABEL: vext_6701_14:
33 ; CHECK: ext v0.8b, v1.8b, v0.8b, #4
34 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 7, i32 0, i32 undef>
38 define <4 x i16> @vext_6701_23(<4 x i16> %a1, <4 x i16> %a2) {
40 ; CHECK-LABEL: vext_6701_23:
41 ; CHECK: ext v0.8b, v1.8b, v0.8b, #4
42 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 6, i32 undef, i32 undef, i32 1>
46 define <4 x i16> @vext_6701_24(<4 x i16> %a1, <4 x i16> %a2) {
48 ; CHECK-LABEL: vext_6701_24:
49 ; CHECK: ext v0.8b, v1.8b, v0.8b, #4
50 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 6, i32 undef, i32 0, i32 undef>
54 define <4 x i16> @vext_6701_34(<4 x i16> %a1, <4 x i16> %a2) {
56 ; CHECK-LABEL: vext_6701_34:
57 ; CHECK: ext v0.8b, v1.8b, v0.8b, #4
58 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 6, i32 7, i32 undef, i32 undef>
62 define <4 x i16> @vext_5670_0(<4 x i16> %a1, <4 x i16> %a2) {
64 ; CHECK-LABEL: vext_5670_0:
65 ; CHECK: ext v0.8b, v1.8b, v0.8b, #2
66 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 5, i32 6, i32 7, i32 0>
70 define <4 x i16> @vext_5670_12(<4 x i16> %a1, <4 x i16> %a2) {
72 ; CHECK-LABEL: vext_5670_12:
73 ; CHECK: ext v0.8b, v1.8b, v0.8b, #2
74 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 undef, i32 7, i32 0>
78 define <4 x i16> @vext_5670_13(<4 x i16> %a1, <4 x i16> %a2) {
80 ; CHECK-LABEL: vext_5670_13:
81 ; CHECK: ext v0.8b, v1.8b, v0.8b, #2
82 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 6, i32 undef, i32 0>
86 define <4 x i16> @vext_5670_14(<4 x i16> %a1, <4 x i16> %a2) {
88 ; CHECK-LABEL: vext_5670_14:
89 ; CHECK: ext v0.8b, v1.8b, v0.8b, #2
90 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 6, i32 7, i32 undef>
94 define <4 x i16> @vext_5670_23(<4 x i16> %a1, <4 x i16> %a2) {
96 ; CHECK-LABEL: vext_5670_23:
97 ; CHECK: ext v0.8b, v1.8b, v0.8b, #2
98 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 5, i32 undef, i32 undef, i32 0>
102 define <4 x i16> @vext_5670_24(<4 x i16> %a1, <4 x i16> %a2) {
104 ; CHECK-LABEL: vext_5670_24:
105 ; CHECK: rev32 v0.4h, v1.4h
106 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 5, i32 undef, i32 7, i32 undef>
110 define <4 x i16> @vext_5670_34(<4 x i16> %a1, <4 x i16> %a2) {
112 ; CHECK-LABEL: vext_5670_34:
113 ; CHECK: ext v0.8b, v1.8b, v0.8b, #2
114 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 5, i32 6, i32 undef, i32 undef>
118 define <4 x i16> @vext_7012_0(<4 x i16> %a1, <4 x i16> %a2) {
120 ; CHECK-LABEL: vext_7012_0:
121 ; CHECK: ext v0.8b, v1.8b, v0.8b, #6
122 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 7, i32 0, i32 1, i32 2>
126 define <4 x i16> @vext_7012_12(<4 x i16> %a1, <4 x i16> %a2) {
128 ; CHECK-LABEL: vext_7012_12:
129 ; CHECK: ext v0.8b, v0.8b, v0.8b, #6
130 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 undef, i32 1, i32 2>
134 define <4 x i16> @vext_7012_13(<4 x i16> %a1, <4 x i16> %a2) {
136 ; CHECK-LABEL: vext_7012_13:
137 ; CHECK: rev32 v0.4h, v0.4h
138 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 0, i32 undef, i32 2>
142 define <4 x i16> @vext_7012_14(<4 x i16> %a1, <4 x i16> %a2) {
144 ; CHECK-LABEL: vext_7012_14:
145 ; CHECK: ext v0.8b, v0.8b, v0.8b, #6
146 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 undef, i32 0, i32 1, i32 undef>
150 define <4 x i16> @vext_7012_23(<4 x i16> %a1, <4 x i16> %a2) {
152 ; CHECK-LABEL: vext_7012_23:
153 ; CHECK: ext v0.8b, v1.8b, v0.8b, #6
154 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 7, i32 undef, i32 undef, i32 2>
158 define <4 x i16> @vext_7012_24(<4 x i16> %a1, <4 x i16> %a2) {
160 ; CHECK-LABEL: vext_7012_24:
161 ; CHECK: ext v0.8b, v1.8b, v0.8b, #6
162 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 7, i32 undef, i32 1, i32 undef>
166 define <4 x i16> @vext_7012_34(<4 x i16> %a1, <4 x i16> %a2) {
168 ; CHECK-LABEL: vext_7012_34:
169 ; CHECK: ext v0.8b, v1.8b, v0.8b, #6
170 %x = shufflevector <4 x i16> %a1, <4 x i16> %a2, <4 x i32> <i32 7, i32 0, i32 undef, i32 undef>