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[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git]
/
test
/
CodeGen
/
AArch64
/
inline-asm-clobber.ll
blob
028cf0b6db1251227c1662a2be33d3e2e8ccf792
1
; RUN: llc <%s -mtriple=aarch64-none-eabi 2>&1 | FileCheck %s
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; CHECK: warning: inline asm clobber list contains reserved registers: SP
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define void @foo() nounwind {
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call void asm sideeffect "mov x7, #1", "~{x7},~{sp}"()
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ret void
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}