[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / test / CodeGen / AArch64 / overlapping-copy-bundle-cycle.mir
blob093473ab472b5fb847bd59b075fde5970764a2d3
1 # RUN: not llc -mtriple=aarch64-apple-ios -run-pass=greedy -run-pass=virtregrewriter %s -o /dev/null 2>&1 | FileCheck %s
3 # Check we don't infinitely loop on cycles in copy bundles.
4 # CHECK: error: register rewriting failed: cycle in copy bundle
6 ---
7 name: func0
8 body: |
9   bb.0:
10     $x0 = IMPLICIT_DEF
11     $q0_q1_q2_q3 = IMPLICIT_DEF
12     $q1_q2_q3 = COPY $q0_q1_q2 {
13       $q2_q3_q4 = COPY $q1_q2_q3
14     }
15     ST4i64 $q1_q2_q3_q4, 0, $x0
16 ...