repo.or.cz
/
llvm-complete.git
/
blob
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
log
|
graphiclog1
|
graphiclog2
|
commit
|
commitdiff
|
tree
|
refs
|
edit
|
fork
blame
|
history
|
raw
|
HEAD
[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git]
/
test
/
CodeGen
/
AArch64
/
zext-logic-shift-load.ll
blob
a75862cfc3b34275535e5e9d6c9f0d93d5de4d15
1
; RUN: llc -mtriple=aarch64-linux-gnu < %s -o - | FileCheck %s
2
3
define i32 @test1(i8* %p) {
4
; CHECK: ldrb
5
; CHECK-NEXT: ubfx
6
; CHECK-NEXT: ret
7
8
%1 = load i8, i8* %p
9
%2 = lshr i8 %1, 1
10
%3 = and i8 %2, 1
11
%4 = zext i8 %3 to i32
12
ret i32 %4
13
}
14