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[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git]
/
test
/
CodeGen
/
ARM
/
PR32721_ifcvt_triangle_unanalyzable.mir
blob
30306fecefe2dd707c024a3f9134cd61f2bf7b54
1
# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s
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---
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name: foo
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body: |
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bb.0:
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B %bb.2
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bb.1:
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BX_RET 14, 0
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bb.2:
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Bcc %bb.1, 1, $cpsr
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bb.3:
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B %bb.1
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...
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# We should get a single block containing the BX_RET, with no successors at all
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# CHECK: body:
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# CHECK-NEXT: bb.0:
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# CHECK-NEXT: BX_RET
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