| blob | 041506816a634a051243a3a1e6b8663176efe23d |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-T1
3 ; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2NODSP
4 ; RUN: llc < %s -mtriple=thumbv7em-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2DSP
5 ; RUN: llc < %s -mtriple=armv8a-none-eabi | FileCheck %s --check-prefix=CHECK-ARM
7 declare i4 @llvm.sadd.sat.i4(i4, i4)
8 declare i8 @llvm.sadd.sat.i8(i8, i8)
9 declare i16 @llvm.sadd.sat.i16(i16, i16)
10 declare i32 @llvm.sadd.sat.i32(i32, i32)
11 declare i64 @llvm.sadd.sat.i64(i64, i64)
13 define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind {
14 ; CHECK-T1-LABEL: func32:
15 ; CHECK-T1: @ %bb.0:
16 ; CHECK-T1-NEXT: mov r3, r0
17 ; CHECK-T1-NEXT: muls r1, r2, r1
18 ; CHECK-T1-NEXT: movs r2, #1
19 ; CHECK-T1-NEXT: adds r0, r0, r1
20 ; CHECK-T1-NEXT: mov r1, r2
21 ; CHECK-T1-NEXT: bmi .LBB0_2
22 ; CHECK-T1-NEXT: @ %bb.1:
23 ; CHECK-T1-NEXT: movs r1, #0
24 ; CHECK-T1-NEXT: .LBB0_2:
25 ; CHECK-T1-NEXT: cmp r1, #0
26 ; CHECK-T1-NEXT: bne .LBB0_4
27 ; CHECK-T1-NEXT: @ %bb.3:
28 ; CHECK-T1-NEXT: lsls r1, r2, #31
29 ; CHECK-T1-NEXT: cmp r0, r3
30 ; CHECK-T1-NEXT: bvs .LBB0_5
31 ; CHECK-T1-NEXT: b .LBB0_6
32 ; CHECK-T1-NEXT: .LBB0_4:
33 ; CHECK-T1-NEXT: ldr r1, .LCPI0_0
34 ; CHECK-T1-NEXT: cmp r0, r3
35 ; CHECK-T1-NEXT: bvc .LBB0_6
36 ; CHECK-T1-NEXT: .LBB0_5:
37 ; CHECK-T1-NEXT: mov r0, r1
38 ; CHECK-T1-NEXT: .LBB0_6:
39 ; CHECK-T1-NEXT: bx lr
40 ; CHECK-T1-NEXT: .p2align 2
41 ; CHECK-T1-NEXT: @ %bb.7:
42 ; CHECK-T1-NEXT: .LCPI0_0:
43 ; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
44 ;
45 ; CHECK-T2NODSP-LABEL: func32:
46 ; CHECK-T2NODSP: @ %bb.0:
47 ; CHECK-T2NODSP-NEXT: mla r2, r1, r2, r0
48 ; CHECK-T2NODSP-NEXT: movs r3, #0
49 ; CHECK-T2NODSP-NEXT: mov.w r1, #-2147483648
50 ; CHECK-T2NODSP-NEXT: cmp r2, #0
51 ; CHECK-T2NODSP-NEXT: it mi
52 ; CHECK-T2NODSP-NEXT: movmi r3, #1
53 ; CHECK-T2NODSP-NEXT: cmp r3, #0
54 ; CHECK-T2NODSP-NEXT: it ne
55 ; CHECK-T2NODSP-NEXT: mvnne r1, #-2147483648
56 ; CHECK-T2NODSP-NEXT: cmp r2, r0
57 ; CHECK-T2NODSP-NEXT: it vc
58 ; CHECK-T2NODSP-NEXT: movvc r1, r2
59 ; CHECK-T2NODSP-NEXT: mov r0, r1
60 ; CHECK-T2NODSP-NEXT: bx lr
61 ;
62 ; CHECK-T2DSP-LABEL: func32:
63 ; CHECK-T2DSP: @ %bb.0:
64 ; CHECK-T2DSP-NEXT: muls r1, r2, r1
65 ; CHECK-T2DSP-NEXT: qadd r0, r0, r1
66 ; CHECK-T2DSP-NEXT: bx lr
67 ;
68 ; CHECK-ARM-LABEL: func32:
69 ; CHECK-ARM: @ %bb.0:
70 ; CHECK-ARM-NEXT: mul r1, r1, r2
71 ; CHECK-ARM-NEXT: qadd r0, r0, r1
72 ; CHECK-ARM-NEXT: bx lr
73 %a = mul i32 %y, %z
74 %tmp = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %a)
75 ret i32 %tmp
76 }
78 define i64 @func64(i64 %x, i64 %y, i64 %z) nounwind {
79 ; CHECK-T1-LABEL: func64:
80 ; CHECK-T1: @ %bb.0:
81 ; CHECK-T1-NEXT: .save {r4, r5, r6, r7, lr}
82 ; CHECK-T1-NEXT: push {r4, r5, r6, r7, lr}
83 ; CHECK-T1-NEXT: .pad #4
84 ; CHECK-T1-NEXT: sub sp, #4
85 ; CHECK-T1-NEXT: ldr r5, [sp, #28]
86 ; CHECK-T1-NEXT: movs r2, #1
87 ; CHECK-T1-NEXT: movs r4, #0
88 ; CHECK-T1-NEXT: cmp r5, #0
89 ; CHECK-T1-NEXT: mov r3, r2
90 ; CHECK-T1-NEXT: bge .LBB1_2
91 ; CHECK-T1-NEXT: @ %bb.1:
92 ; CHECK-T1-NEXT: mov r3, r4
93 ; CHECK-T1-NEXT: .LBB1_2:
94 ; CHECK-T1-NEXT: cmp r1, #0
95 ; CHECK-T1-NEXT: mov r6, r2
96 ; CHECK-T1-NEXT: bge .LBB1_4
97 ; CHECK-T1-NEXT: @ %bb.3:
98 ; CHECK-T1-NEXT: mov r6, r4
99 ; CHECK-T1-NEXT: .LBB1_4:
100 ; CHECK-T1-NEXT: subs r7, r6, r3
101 ; CHECK-T1-NEXT: rsbs r3, r7, #0
102 ; CHECK-T1-NEXT: adcs r3, r7
103 ; CHECK-T1-NEXT: ldr r7, [sp, #24]
104 ; CHECK-T1-NEXT: adds r0, r0, r7
105 ; CHECK-T1-NEXT: adcs r1, r5
106 ; CHECK-T1-NEXT: cmp r1, #0
107 ; CHECK-T1-NEXT: mov r5, r2
108 ; CHECK-T1-NEXT: bge .LBB1_6
109 ; CHECK-T1-NEXT: @ %bb.5:
110 ; CHECK-T1-NEXT: mov r5, r4
111 ; CHECK-T1-NEXT: .LBB1_6:
112 ; CHECK-T1-NEXT: subs r4, r6, r5
113 ; CHECK-T1-NEXT: subs r5, r4, #1
114 ; CHECK-T1-NEXT: sbcs r4, r5
115 ; CHECK-T1-NEXT: ands r3, r4
116 ; CHECK-T1-NEXT: beq .LBB1_8
117 ; CHECK-T1-NEXT: @ %bb.7:
118 ; CHECK-T1-NEXT: asrs r0, r1, #31
119 ; CHECK-T1-NEXT: .LBB1_8:
120 ; CHECK-T1-NEXT: cmp r1, #0
121 ; CHECK-T1-NEXT: bmi .LBB1_10
122 ; CHECK-T1-NEXT: @ %bb.9:
123 ; CHECK-T1-NEXT: lsls r2, r2, #31
124 ; CHECK-T1-NEXT: cmp r3, #0
125 ; CHECK-T1-NEXT: beq .LBB1_11
126 ; CHECK-T1-NEXT: b .LBB1_12
127 ; CHECK-T1-NEXT: .LBB1_10:
128 ; CHECK-T1-NEXT: ldr r2, .LCPI1_0
129 ; CHECK-T1-NEXT: cmp r3, #0
130 ; CHECK-T1-NEXT: bne .LBB1_12
131 ; CHECK-T1-NEXT: .LBB1_11:
132 ; CHECK-T1-NEXT: mov r2, r1
133 ; CHECK-T1-NEXT: .LBB1_12:
134 ; CHECK-T1-NEXT: mov r1, r2
135 ; CHECK-T1-NEXT: add sp, #4
136 ; CHECK-T1-NEXT: pop {r4, r5, r6, r7, pc}
137 ; CHECK-T1-NEXT: .p2align 2
138 ; CHECK-T1-NEXT: @ %bb.13:
139 ; CHECK-T1-NEXT: .LCPI1_0:
140 ; CHECK-T1-NEXT: .long 2147483647 @ 0x7fffffff
141 ;
142 ; CHECK-T2-LABEL: func64:
143 ; CHECK-T2: @ %bb.0:
144 ; CHECK-T2-NEXT: .save {r7, lr}
145 ; CHECK-T2-NEXT: push {r7, lr}
146 ; CHECK-T2-NEXT: ldrd r2, r12, [sp, #8]
147 ; CHECK-T2-NEXT: cmp.w r1, #-1
148 ; CHECK-T2-NEXT: mov.w r3, #0
149 ; CHECK-T2-NEXT: mov.w lr, #0
150 ; CHECK-T2-NEXT: it gt
151 ; CHECK-T2-NEXT: movgt r3, #1
152 ; CHECK-T2-NEXT: adds r0, r0, r2
153 ; CHECK-T2-NEXT: adc.w r2, r1, r12
154 ; CHECK-T2-NEXT: movs r1, #0
155 ; CHECK-T2-NEXT: cmp.w r2, #-1
156 ; CHECK-T2-NEXT: it gt
157 ; CHECK-T2-NEXT: movgt r1, #1
158 ; CHECK-T2-NEXT: subs r1, r3, r1
159 ; CHECK-T2-NEXT: it ne
160 ; CHECK-T2-NEXT: movne r1, #1
161 ; CHECK-T2-NEXT: cmp.w r12, #-1
162 ; CHECK-T2-NEXT: it gt
163 ; CHECK-T2-NEXT: movgt.w lr, #1
164 ; CHECK-T2-NEXT: sub.w r3, r3, lr
165 ; CHECK-T2-NEXT: clz r3, r3
166 ; CHECK-T2-NEXT: lsrs r3, r3, #5
167 ; CHECK-T2-NEXT: ands r3, r1
168 ; CHECK-T2-NEXT: mov.w r1, #-2147483648
169 ; CHECK-T2-NEXT: it ne
170 ; CHECK-T2-NEXT: asrne r0, r2, #31
171 ; CHECK-T2-NEXT: cmp r2, #0
172 ; CHECK-T2-NEXT: it mi
173 ; CHECK-T2-NEXT: mvnmi r1, #-2147483648
174 ; CHECK-T2-NEXT: cmp r3, #0
175 ; CHECK-T2-NEXT: it eq
176 ; CHECK-T2-NEXT: moveq r1, r2
177 ; CHECK-T2-NEXT: pop {r7, pc}
178 ;
179 ; CHECK-ARM-LABEL: func64:
180 ; CHECK-ARM: @ %bb.0:
181 ; CHECK-ARM-NEXT: .save {r11, lr}
182 ; CHECK-ARM-NEXT: push {r11, lr}
183 ; CHECK-ARM-NEXT: ldr r2, [sp, #8]
184 ; CHECK-ARM-NEXT: mov r3, #0
185 ; CHECK-ARM-NEXT: ldr r12, [sp, #12]
186 ; CHECK-ARM-NEXT: adds r0, r0, r2
187 ; CHECK-ARM-NEXT: mov r2, #0
188 ; CHECK-ARM-NEXT: adc lr, r1, r12
189 ; CHECK-ARM-NEXT: cmn r1, #1
190 ; CHECK-ARM-NEXT: mov r1, #0
191 ; CHECK-ARM-NEXT: movwgt r1, #1
192 ; CHECK-ARM-NEXT: cmn lr, #1
193 ; CHECK-ARM-NEXT: movwgt r2, #1
194 ; CHECK-ARM-NEXT: subs r2, r1, r2
195 ; CHECK-ARM-NEXT: movwne r2, #1
196 ; CHECK-ARM-NEXT: cmn r12, #1
197 ; CHECK-ARM-NEXT: movwgt r3, #1
198 ; CHECK-ARM-NEXT: sub r1, r1, r3
199 ; CHECK-ARM-NEXT: clz r1, r1
200 ; CHECK-ARM-NEXT: lsr r1, r1, #5
201 ; CHECK-ARM-NEXT: ands r2, r1, r2
202 ; CHECK-ARM-NEXT: asrne r0, lr, #31
203 ; CHECK-ARM-NEXT: mov r1, #-2147483648
204 ; CHECK-ARM-NEXT: cmp lr, #0
205 ; CHECK-ARM-NEXT: mvnmi r1, #-2147483648
206 ; CHECK-ARM-NEXT: cmp r2, #0
207 ; CHECK-ARM-NEXT: moveq r1, lr
208 ; CHECK-ARM-NEXT: pop {r11, pc}
209 %a = mul i64 %y, %z
210 %tmp = call i64 @llvm.sadd.sat.i64(i64 %x, i64 %z)
211 ret i64 %tmp
212 }
214 define signext i16 @func16(i16 signext %x, i16 signext %y, i16 signext %z) nounwind {
215 ; CHECK-T1-LABEL: func16:
216 ; CHECK-T1: @ %bb.0:
217 ; CHECK-T1-NEXT: muls r1, r2, r1
218 ; CHECK-T1-NEXT: sxth r1, r1
219 ; CHECK-T1-NEXT: adds r0, r0, r1
220 ; CHECK-T1-NEXT: ldr r1, .LCPI2_0
221 ; CHECK-T1-NEXT: cmp r0, r1
222 ; CHECK-T1-NEXT: blt .LBB2_2
223 ; CHECK-T1-NEXT: @ %bb.1:
224 ; CHECK-T1-NEXT: mov r0, r1
225 ; CHECK-T1-NEXT: .LBB2_2:
226 ; CHECK-T1-NEXT: ldr r1, .LCPI2_1
227 ; CHECK-T1-NEXT: cmp r0, r1
228 ; CHECK-T1-NEXT: bgt .LBB2_4
229 ; CHECK-T1-NEXT: @ %bb.3:
230 ; CHECK-T1-NEXT: mov r0, r1
231 ; CHECK-T1-NEXT: .LBB2_4:
232 ; CHECK-T1-NEXT: bx lr
233 ; CHECK-T1-NEXT: .p2align 2
234 ; CHECK-T1-NEXT: @ %bb.5:
235 ; CHECK-T1-NEXT: .LCPI2_0:
236 ; CHECK-T1-NEXT: .long 32767 @ 0x7fff
237 ; CHECK-T1-NEXT: .LCPI2_1:
238 ; CHECK-T1-NEXT: .long 4294934528 @ 0xffff8000
239 ;
240 ; CHECK-T2NODSP-LABEL: func16:
241 ; CHECK-T2NODSP: @ %bb.0:
242 ; CHECK-T2NODSP-NEXT: muls r1, r2, r1
243 ; CHECK-T2NODSP-NEXT: sxth r1, r1
244 ; CHECK-T2NODSP-NEXT: add r0, r1
245 ; CHECK-T2NODSP-NEXT: movw r1, #32767
246 ; CHECK-T2NODSP-NEXT: cmp r0, r1
247 ; CHECK-T2NODSP-NEXT: it lt
248 ; CHECK-T2NODSP-NEXT: movlt r1, r0
249 ; CHECK-T2NODSP-NEXT: movw r0, #32768
250 ; CHECK-T2NODSP-NEXT: movt r0, #65535
251 ; CHECK-T2NODSP-NEXT: cmn.w r1, #32768
252 ; CHECK-T2NODSP-NEXT: it gt
253 ; CHECK-T2NODSP-NEXT: movgt r0, r1
254 ; CHECK-T2NODSP-NEXT: bx lr
255 ;
256 ; CHECK-T2DSP-LABEL: func16:
257 ; CHECK-T2DSP: @ %bb.0:
258 ; CHECK-T2DSP-NEXT: muls r1, r2, r1
259 ; CHECK-T2DSP-NEXT: qadd16 r0, r0, r1
260 ; CHECK-T2DSP-NEXT: sxth r0, r0
261 ; CHECK-T2DSP-NEXT: bx lr
262 ;
263 ; CHECK-ARM-LABEL: func16:
264 ; CHECK-ARM: @ %bb.0:
265 ; CHECK-ARM-NEXT: smulbb r1, r1, r2
266 ; CHECK-ARM-NEXT: qadd16 r0, r0, r1
267 ; CHECK-ARM-NEXT: sxth r0, r0
268 ; CHECK-ARM-NEXT: bx lr
269 %a = mul i16 %y, %z
270 %tmp = call i16 @llvm.sadd.sat.i16(i16 %x, i16 %a)
271 ret i16 %tmp
272 }
274 define signext i8 @func8(i8 signext %x, i8 signext %y, i8 signext %z) nounwind {
275 ; CHECK-T1-LABEL: func8:
276 ; CHECK-T1: @ %bb.0:
277 ; CHECK-T1-NEXT: muls r1, r2, r1
278 ; CHECK-T1-NEXT: sxtb r1, r1
279 ; CHECK-T1-NEXT: adds r0, r0, r1
280 ; CHECK-T1-NEXT: movs r1, #127
281 ; CHECK-T1-NEXT: cmp r0, #127
282 ; CHECK-T1-NEXT: blt .LBB3_2
283 ; CHECK-T1-NEXT: @ %bb.1:
284 ; CHECK-T1-NEXT: mov r0, r1
285 ; CHECK-T1-NEXT: .LBB3_2:
286 ; CHECK-T1-NEXT: mvns r1, r1
287 ; CHECK-T1-NEXT: cmp r0, r1
288 ; CHECK-T1-NEXT: bgt .LBB3_4
289 ; CHECK-T1-NEXT: @ %bb.3:
290 ; CHECK-T1-NEXT: mov r0, r1
291 ; CHECK-T1-NEXT: .LBB3_4:
292 ; CHECK-T1-NEXT: bx lr
293 ;
294 ; CHECK-T2NODSP-LABEL: func8:
295 ; CHECK-T2NODSP: @ %bb.0:
296 ; CHECK-T2NODSP-NEXT: muls r1, r2, r1
297 ; CHECK-T2NODSP-NEXT: sxtb r1, r1
298 ; CHECK-T2NODSP-NEXT: add r0, r1
299 ; CHECK-T2NODSP-NEXT: cmp r0, #127
300 ; CHECK-T2NODSP-NEXT: it ge
301 ; CHECK-T2NODSP-NEXT: movge r0, #127
302 ; CHECK-T2NODSP-NEXT: cmn.w r0, #128
303 ; CHECK-T2NODSP-NEXT: it le
304 ; CHECK-T2NODSP-NEXT: mvnle r0, #127
305 ; CHECK-T2NODSP-NEXT: bx lr
306 ;
307 ; CHECK-T2DSP-LABEL: func8:
308 ; CHECK-T2DSP: @ %bb.0:
309 ; CHECK-T2DSP-NEXT: muls r1, r2, r1
310 ; CHECK-T2DSP-NEXT: qadd8 r0, r0, r1
311 ; CHECK-T2DSP-NEXT: sxtb r0, r0
312 ; CHECK-T2DSP-NEXT: bx lr
313 ;
314 ; CHECK-ARM-LABEL: func8:
315 ; CHECK-ARM: @ %bb.0:
316 ; CHECK-ARM-NEXT: smulbb r1, r1, r2
317 ; CHECK-ARM-NEXT: qadd8 r0, r0, r1
318 ; CHECK-ARM-NEXT: sxtb r0, r0
319 ; CHECK-ARM-NEXT: bx lr
320 %a = mul i8 %y, %z
321 %tmp = call i8 @llvm.sadd.sat.i8(i8 %x, i8 %a)
322 ret i8 %tmp
323 }
325 define signext i4 @func4(i4 signext %x, i4 signext %y, i4 signext %z) nounwind {
326 ; CHECK-T1-LABEL: func4:
327 ; CHECK-T1: @ %bb.0:
328 ; CHECK-T1-NEXT: muls r1, r2, r1
329 ; CHECK-T1-NEXT: lsls r1, r1, #28
330 ; CHECK-T1-NEXT: asrs r1, r1, #28
331 ; CHECK-T1-NEXT: adds r0, r0, r1
332 ; CHECK-T1-NEXT: movs r1, #7
333 ; CHECK-T1-NEXT: cmp r0, #7
334 ; CHECK-T1-NEXT: blt .LBB4_2
335 ; CHECK-T1-NEXT: @ %bb.1:
336 ; CHECK-T1-NEXT: mov r0, r1
337 ; CHECK-T1-NEXT: .LBB4_2:
338 ; CHECK-T1-NEXT: mvns r1, r1
339 ; CHECK-T1-NEXT: cmp r0, r1
340 ; CHECK-T1-NEXT: bgt .LBB4_4
341 ; CHECK-T1-NEXT: @ %bb.3:
342 ; CHECK-T1-NEXT: mov r0, r1
343 ; CHECK-T1-NEXT: .LBB4_4:
344 ; CHECK-T1-NEXT: bx lr
345 ;
346 ; CHECK-T2NODSP-LABEL: func4:
347 ; CHECK-T2NODSP: @ %bb.0:
348 ; CHECK-T2NODSP-NEXT: muls r1, r2, r1
349 ; CHECK-T2NODSP-NEXT: lsls r1, r1, #28
350 ; CHECK-T2NODSP-NEXT: add.w r0, r0, r1, asr #28
351 ; CHECK-T2NODSP-NEXT: cmp r0, #7
352 ; CHECK-T2NODSP-NEXT: it ge
353 ; CHECK-T2NODSP-NEXT: movge r0, #7
354 ; CHECK-T2NODSP-NEXT: cmn.w r0, #8
355 ; CHECK-T2NODSP-NEXT: it le
356 ; CHECK-T2NODSP-NEXT: mvnle r0, #7
357 ; CHECK-T2NODSP-NEXT: bx lr
358 ;
359 ; CHECK-T2DSP-LABEL: func4:
360 ; CHECK-T2DSP: @ %bb.0:
361 ; CHECK-T2DSP-NEXT: muls r1, r2, r1
362 ; CHECK-T2DSP-NEXT: lsls r0, r0, #28
363 ; CHECK-T2DSP-NEXT: lsls r1, r1, #28
364 ; CHECK-T2DSP-NEXT: qadd r0, r0, r1
365 ; CHECK-T2DSP-NEXT: asrs r0, r0, #28
366 ; CHECK-T2DSP-NEXT: bx lr
367 ;
368 ; CHECK-ARM-LABEL: func4:
369 ; CHECK-ARM: @ %bb.0:
370 ; CHECK-ARM-NEXT: smulbb r1, r1, r2
371 ; CHECK-ARM-NEXT: lsl r0, r0, #28
372 ; CHECK-ARM-NEXT: lsl r1, r1, #28
373 ; CHECK-ARM-NEXT: qadd r0, r0, r1
374 ; CHECK-ARM-NEXT: asr r0, r0, #28
375 ; CHECK-ARM-NEXT: bx lr
376 %a = mul i4 %y, %z
377 %tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %a)
378 ret i4 %tmp
379 }