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[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git]
/
test
/
CodeGen
/
AVR
/
sext.ll
blob
7fb6d84ec446c1a47c890705145a18e96a694637
1
; RUN: llc < %s -march=avr | FileCheck %s
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; sext R17:R16, R13
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; mov r16, r13
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; mov r17, r13
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; lsl r17
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; sbc r17, r17
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define i16 @sext1(i8 %x, i8 %y) {
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; CHECK-LABEL: sext1:
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; CHECK: mov r24, r22
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; CHECK: mov r25, r22
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; CHECK: lsl r25
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; CHECK: sbc r25, r25
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%1 = sext i8 %y to i16
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ret i16 %1
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}
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; sext R17:R16, R16
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; mov r17, r16
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; lsl r17
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; sbc r17, r17
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define i16 @sext2(i8 %x) {
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; CHECK-LABEL: sext2:
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; CHECK: mov r25, r24
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; CHECK: lsl r25
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; CHECK: sbc r25, r25
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%1 = sext i8 %x to i16
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ret i16 %1
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}