[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / test / CodeGen / Generic / 2006-09-02-LocalAllocCrash.ll
blob0c4a9c452cd9007dd9c0e56288eb1274725497a7
1 ; RUN: llc < %s -regalloc=fast -optimize-regalloc=0
2         
3 %struct.CHESS_POSITION = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32, i8, i8, [64 x i8], i8, i8, i8, i8, i8 }
4 @search = external global %struct.CHESS_POSITION                ; <%struct.CHESS_POSITION*> [#uses=2]
5 @bishop_shift_rl45 = external global [64 x i32]         ; <[64 x i32]*> [#uses=1]
6 @bishop_shift_rr45 = external global [64 x i32]         ; <[64 x i32]*> [#uses=1]
7 @black_outpost = external global [64 x i8]              ; <[64 x i8]*> [#uses=1]
8 @bishop_mobility_rl45 = external global [64 x [256 x i32]]              ; <[64 x [256 x i32]]*> [#uses=1]
9 @bishop_mobility_rr45 = external global [64 x [256 x i32]]              ; <[64 x [256 x i32]]*> [#uses=1]
11 declare fastcc i32 @FirstOne()
13 define fastcc void @Evaluate() {
14 entry:
15         br i1 false, label %cond_false186, label %cond_true
17 cond_true:              ; preds = %entry
18         ret void
20 cond_false186:          ; preds = %entry
21         br i1 false, label %cond_true293, label %bb203
23 bb203:          ; preds = %cond_false186
24         ret void
26 cond_true293:           ; preds = %cond_false186
27         br i1 false, label %cond_true298, label %cond_next317
29 cond_true298:           ; preds = %cond_true293
30         br i1 false, label %cond_next518, label %cond_true397.preheader
32 cond_next317:           ; preds = %cond_true293
33         ret void
35 cond_true397.preheader:         ; preds = %cond_true298
36         ret void
38 cond_next518:           ; preds = %cond_true298
39         br i1 false, label %bb1069, label %cond_true522
41 cond_true522:           ; preds = %cond_next518
42         ret void
44 bb1069:         ; preds = %cond_next518
45         br i1 false, label %cond_next1131, label %bb1096
47 bb1096:         ; preds = %bb1069
48         ret void
50 cond_next1131:          ; preds = %bb1069
51         br i1 false, label %cond_next1207, label %cond_true1150
53 cond_true1150:          ; preds = %cond_next1131
54         ret void
56 cond_next1207:          ; preds = %cond_next1131
57         br i1 false, label %cond_next1219, label %cond_true1211
59 cond_true1211:          ; preds = %cond_next1207
60         ret void
62 cond_next1219:          ; preds = %cond_next1207
63         br i1 false, label %cond_true1223, label %cond_next1283
65 cond_true1223:          ; preds = %cond_next1219
66         br i1 false, label %cond_true1254, label %cond_true1264
68 cond_true1254:          ; preds = %cond_true1223
69         br i1 false, label %bb1567, label %cond_true1369.preheader
71 cond_true1264:          ; preds = %cond_true1223
72         ret void
74 cond_next1283:          ; preds = %cond_next1219
75         ret void
77 cond_true1369.preheader:                ; preds = %cond_true1254
78         ret void
80 bb1567:         ; preds = %cond_true1254
81         %tmp1580 = load i64, i64* getelementptr (%struct.CHESS_POSITION, %struct.CHESS_POSITION* @search, i32 0, i32 3)         ; <i64> [#uses=1]
82         %tmp1591 = load i64, i64* getelementptr (%struct.CHESS_POSITION, %struct.CHESS_POSITION* @search, i32 0, i32 4)         ; <i64> [#uses=1]
83         %tmp1572 = tail call fastcc i32 @FirstOne( )            ; <i32> [#uses=5]
84         %tmp1582 = getelementptr [64 x i32], [64 x i32]* @bishop_shift_rl45, i32 0, i32 %tmp1572                ; <i32*> [#uses=1]
85         %tmp1583 = load i32, i32* %tmp1582              ; <i32> [#uses=1]
86         %tmp1583.upgrd.1 = trunc i32 %tmp1583 to i8             ; <i8> [#uses=1]
87         %shift.upgrd.2 = zext i8 %tmp1583.upgrd.1 to i64                ; <i64> [#uses=1]
88         %tmp1584 = lshr i64 %tmp1580, %shift.upgrd.2            ; <i64> [#uses=1]
89         %tmp1584.upgrd.3 = trunc i64 %tmp1584 to i32            ; <i32> [#uses=1]
90         %tmp1585 = and i32 %tmp1584.upgrd.3, 255                ; <i32> [#uses=1]
91         %gep.upgrd.4 = zext i32 %tmp1585 to i64         ; <i64> [#uses=1]
92         %tmp1587 = getelementptr [64 x [256 x i32]], [64 x [256 x i32]]* @bishop_mobility_rl45, i32 0, i32 %tmp1572, i64 %gep.upgrd.4           ; <i32*> [#uses=1]
93         %tmp1588 = load i32, i32* %tmp1587              ; <i32> [#uses=1]
94         %tmp1593 = getelementptr [64 x i32], [64 x i32]* @bishop_shift_rr45, i32 0, i32 %tmp1572                ; <i32*> [#uses=1]
95         %tmp1594 = load i32, i32* %tmp1593              ; <i32> [#uses=1]
96         %tmp1594.upgrd.5 = trunc i32 %tmp1594 to i8             ; <i8> [#uses=1]
97         %shift.upgrd.6 = zext i8 %tmp1594.upgrd.5 to i64                ; <i64> [#uses=1]
98         %tmp1595 = lshr i64 %tmp1591, %shift.upgrd.6            ; <i64> [#uses=1]
99         %tmp1595.upgrd.7 = trunc i64 %tmp1595 to i32            ; <i32> [#uses=1]
100         %tmp1596 = and i32 %tmp1595.upgrd.7, 255                ; <i32> [#uses=1]
101         %gep.upgrd.8 = zext i32 %tmp1596 to i64         ; <i64> [#uses=1]
102         %tmp1598 = getelementptr [64 x [256 x i32]], [64 x [256 x i32]]* @bishop_mobility_rr45, i32 0, i32 %tmp1572, i64 %gep.upgrd.8           ; <i32*> [#uses=1]
103         %tmp1599 = load i32, i32* %tmp1598              ; <i32> [#uses=1]
104         %tmp1600.neg = sub i32 0, %tmp1588              ; <i32> [#uses=1]
105         %tmp1602 = sub i32 %tmp1600.neg, %tmp1599               ; <i32> [#uses=1]
106         %tmp1604 = getelementptr [64 x i8], [64 x i8]* @black_outpost, i32 0, i32 %tmp1572              ; <i8*> [#uses=1]
107         %tmp1605 = load i8, i8* %tmp1604                ; <i8> [#uses=1]
108         %tmp1606 = icmp eq i8 %tmp1605, 0               ; <i1> [#uses=1]
109         br i1 %tmp1606, label %cond_next1637, label %cond_true1607
111 cond_true1607:          ; preds = %bb1567
112         ret void
114 cond_next1637:          ; preds = %bb1567
115         %tmp1662 = sub i32 %tmp1602, 0          ; <i32> [#uses=0]
116         ret void