1 ; RUN: llc -march=hexagon < %s | FileCheck %s
3 ; CHECK-DAG: r[[REG:[0-9]+]] = memw(r{{[0-9]+<<#[0-9]+}}+##.LJTI{{.*}})
4 ; CHECK-DAG: jumpr r[[REG]]
6 define void @main() #0 {
8 %ret = alloca i32, align 4
12 %ret.0.load17 = load volatile i32, i32* %ret, align 4
13 switch i32 %ret.0.load17, label %label6 [
23 %ret.0.load18 = load volatile i32, i32* %ret, align 4
24 %inc = add nsw i32 %ret.0.load18, 1
25 store volatile i32 %inc, i32* %ret, align 4
29 %ret.0.load19 = load volatile i32, i32* %ret, align 4
30 %inc2 = add nsw i32 %ret.0.load19, 1
31 store volatile i32 %inc2, i32* %ret, align 4
35 %ret.0.load20 = load volatile i32, i32* %ret, align 4
36 %inc4 = add nsw i32 %ret.0.load20, 1
37 store volatile i32 %inc4, i32* %ret, align 4
41 %ret.0.load21 = load volatile i32, i32* %ret, align 4
42 %inc6 = add nsw i32 %ret.0.load21, 1
43 store volatile i32 %inc6, i32* %ret, align 4
47 %ret.0.load22 = load volatile i32, i32* %ret, align 4
48 %inc8 = add nsw i32 %ret.0.load22, 1
49 store volatile i32 %inc8, i32* %ret, align 4
53 %ret.0.load23 = load volatile i32, i32* %ret, align 4
54 %inc10 = add nsw i32 %ret.0.load23, 1
55 store volatile i32 %inc10, i32* %ret, align 4
59 store volatile i32 0, i32* %ret, align 4
63 attributes #0 = { noreturn nounwind }