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[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git]
/
test
/
CodeGen
/
Hexagon
/
generic-cpu.ll
blob
10b1030dab173a4c09a90751f56dc26fdfb35e9a
1
; RUN: llc -mtriple=hexagon-unknown-elf -mcpu=generic < %s | FileCheck %s
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; CHECK-NOT: invalid CPU
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define i32 @test(i32 %a) {
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ret i32 0
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}