1 ; RUN: llc -march=hexagon < %s
4 ; The two loads based on %struct.0, loading two different data types
5 ; cause LSR to assume type "void" for the memory type. This would then
6 ; cause an assert in isLegalAddressingMode. Make sure we no longer crash.
8 target triple = "hexagon"
10 %struct.0 = type { i8*, i8, %union.anon.0 }
11 %union.anon.0 = type { i8* }
13 define hidden fastcc void @fred() unnamed_addr #0 {
15 br i1 undef, label %while.end, label %while.body.lr.ph
17 while.body.lr.ph: ; preds = %entry
20 while.body: ; preds = %exit.2, %while.body.lr.ph
21 %lsr.iv = phi %struct.0* [ %cgep22, %exit.2 ], [ undef, %while.body.lr.ph ]
22 switch i32 undef, label %exit [
24 i32 2, label %sw.bb3.i
27 sw.bb.i: ; preds = %while.body
30 sw.bb3.i: ; preds = %while.body
33 exit: ; preds = %while.body
34 switch i32 undef, label %exit.2 [
35 i32 1, label %sw.bb.i17
36 i32 2, label %sw.bb3.i20
39 sw.bb.i17: ; preds = %.exit
40 %0 = bitcast %struct.0* %lsr.iv to i32*
41 %1 = load i32, i32* %0, align 4
44 sw.bb3.i20: ; preds = %exit
45 %2 = bitcast %struct.0* %lsr.iv to i8**
46 %3 = load i8*, i8** %2, align 4
49 exit.2: ; preds = %exit
50 %cgep22 = getelementptr %struct.0, %struct.0* %lsr.iv, i32 1
53 while.end: ; preds = %entry
57 attributes #0 = { nounwind optsize "target-cpu"="hexagonv55" }