1 ; RUN: llc -march=hexagon < %s | FileCheck %s
4 ; CHECK: r{{[1-9]+:[0-9]+}} = memd(r{{[0-9]*}}++#{{[0-9]}}:circ(m{{[01]}}))
5 define i64 @f0(i64* %a0) {
7 %v0 = alloca i64, align 8
8 %v1 = getelementptr inbounds i64, i64* %a0, i32 1
9 store i64 0, i64* %v0, align 8, !tbaa !0
10 %v2 = bitcast i64* %v1 to i8*
11 %v3 = bitcast i64* %v0 to i8*
12 %v4 = call i8* @llvm.hexagon.circ.ldd(i8* %v2, i8* %v3, i32 150996984, i32 8)
13 %v5 = load i64, i64* %v0, align 8, !tbaa !0
17 ; Function Attrs: argmemonly nounwind
18 declare i8* @llvm.hexagon.circ.ldd(i8*, i8*, i32, i32) #0
21 ; CHECK: r{{[0-9]*}} = memb(r{{[0-9]*}}++#{{[0-9]}}:circ(m{{[01]}}))
22 define signext i8 @f1(i8* %a0) {
24 %v0 = alloca i8, align 1
25 %v1 = getelementptr inbounds i8, i8* %a0, i32 1
26 store i8 0, i8* %v0, align 1, !tbaa !4
27 %v2 = call i8* @llvm.hexagon.circ.ldb(i8* %v1, i8* %v0, i32 16777471, i32 1)
28 %v3 = load i8, i8* %v0, align 1, !tbaa !4
32 ; Function Attrs: argmemonly nounwind
33 declare i8* @llvm.hexagon.circ.ldb(i8*, i8*, i32, i32) #0
36 ; CHECK: r{{[0-9]*}} = memub(r{{[0-9]*}}++#{{[0-9]}}:circ(m{{[01]}}))
37 define signext i8 @f2(i8* %a0) {
39 %v0 = alloca i8, align 1
40 %v1 = getelementptr inbounds i8, i8* %a0, i32 1
41 store i8 0, i8* %v0, align 1, !tbaa !4
42 %v2 = call i8* @llvm.hexagon.circ.ldub(i8* %v1, i8* %v0, i32 16777471, i32 1)
43 %v3 = load i8, i8* %v0, align 1, !tbaa !4
47 ; Function Attrs: argmemonly nounwind
48 declare i8* @llvm.hexagon.circ.ldub(i8*, i8*, i32, i32) #0
51 ; CHECK: r{{[0-9]*}} = memh(r{{[0-9]*}}++#{{[0-9]}}:circ(m{{[01]}}))
52 define signext i16 @f3(i16* %a0) {
54 %v0 = alloca i16, align 2
55 %v1 = getelementptr inbounds i16, i16* %a0, i32 1
56 store i16 0, i16* %v0, align 2, !tbaa !5
57 %v2 = bitcast i16* %v1 to i8*
58 %v3 = bitcast i16* %v0 to i8*
59 %v4 = call i8* @llvm.hexagon.circ.ldh(i8* %v2, i8* %v3, i32 33554942, i32 2)
60 %v5 = load i16, i16* %v0, align 2, !tbaa !5
64 ; Function Attrs: argmemonly nounwind
65 declare i8* @llvm.hexagon.circ.ldh(i8*, i8*, i32, i32) #0
68 ; CHECK: r{{[0-9]*}} = memuh(r{{[0-9]*}}++#{{[0-9]}}:circ(m{{[01]}}))
69 define signext i16 @f4(i16* %a0) {
71 %v0 = alloca i16, align 2
72 %v1 = getelementptr inbounds i16, i16* %a0, i32 1
73 store i16 0, i16* %v0, align 2, !tbaa !5
74 %v2 = bitcast i16* %v1 to i8*
75 %v3 = bitcast i16* %v0 to i8*
76 %v4 = call i8* @llvm.hexagon.circ.lduh(i8* %v2, i8* %v3, i32 33554942, i32 2)
77 %v5 = load i16, i16* %v0, align 2, !tbaa !5
81 ; Function Attrs: argmemonly nounwind
82 declare i8* @llvm.hexagon.circ.lduh(i8*, i8*, i32, i32) #0
85 ; CHECK: r{{[0-9]*}} = memw(r{{[0-9]*}}++#{{[0-9]}}:circ(m{{[01]}}))
86 define i32 @f5(i32* %a0) {
88 %v0 = alloca i32, align 4
89 %v1 = getelementptr inbounds i32, i32* %a0, i32 1
90 store i32 0, i32* %v0, align 4, !tbaa !7
91 %v2 = bitcast i32* %v1 to i8*
92 %v3 = bitcast i32* %v0 to i8*
93 %v4 = call i8* @llvm.hexagon.circ.ldw(i8* %v2, i8* %v3, i32 50332668, i32 4)
94 %v5 = load i32, i32* %v0, align 4, !tbaa !7
98 ; Function Attrs: argmemonly nounwind
99 declare i8* @llvm.hexagon.circ.ldw(i8*, i8*, i32, i32) #0
101 attributes #0 = { argmemonly nounwind }
103 !0 = !{!1, !1, i64 0}
104 !1 = !{!"long long", !2, i64 0}
105 !2 = !{!"omnipotent char", !3, i64 0}
106 !3 = !{!"Simple C/C++ TBAA"}
107 !4 = !{!2, !2, i64 0}
108 !5 = !{!6, !6, i64 0}
109 !6 = !{!"short", !2, i64 0}
110 !7 = !{!8, !8, i64 0}
111 !8 = !{!"long", !2, i64 0}