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[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git]
/
test
/
CodeGen
/
Hexagon
/
mux-kill1.mir
blob
e258d870a27a312dfd64824858bd928699f15b0c
1
# RUN: llc -march=hexagon -run-pass hexagon-gen-mux -o - %s -verify-machineinstrs | FileCheck %s
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# CHECK: $r2 = C2_mux killed $p0, killed $r0, $r1
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---
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name: fred
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $d0, $p0
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$r2 = A2_tfrt $p0, $r0
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$r0 = A2_tfr $r1
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$r2 = A2_tfrf $p0, killed $r1
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...
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