| blob | f89df6e55734d387df9e60d9d633876f3d4bf691 |
1 ; REQUIRES: asserts
3 ; RUN: llc -march=hexagon -mcpu=hexagonv65 -O3 -debug-only=pipeliner \
4 ; RUN: < %s 2>&1 -pipeliner-experimental-cg=true | FileCheck %s
6 ; Test that the artificial dependences are ignored while computing the
7 ; circuits.
9 ; The recurrence should be 1 here. If we do not ignore artificial deps,
10 ; it will be greater.
11 ; CHECK: rec=1,
13 define void @foo(i32 %size) #0 {
14 entry:
15 %add = add nsw i32 0, 4
16 %shr = ashr i32 %size, 1
17 br i1 undef, label %L57.us, label %L57.us.ur
19 L57.us:
20 %R9.0470.us = phi i32 [ %sub40.us.3, %L57.us ], [ undef, %entry ]
21 %sub40.us.3 = add i32 %R9.0470.us, -64
22 br i1 undef, label %L57.us, label %for.cond22.for.end_crit_edge.us.ur-lcssa
24 for.cond22.for.end_crit_edge.us.ur-lcssa:
25 %inc.us.3.lcssa = phi i32 [ undef, %L57.us ]
26 %sub40.us.3.lcssa = phi i32 [ %sub40.us.3, %L57.us ]
27 %0 = icmp eq i32 %inc.us.3.lcssa, %shr
28 br i1 %0, label %for.cond22.for.end_crit_edge.us, label %L57.us.ur
30 L57.us.ur:
31 %R15_14.0478.us.ur = phi i64 [ %1, %L57.us.ur ], [ 0, %entry ], [ undef, %for.cond22.for.end_crit_edge.us.ur-lcssa ]
32 %R13_12.0477.us.ur = phi i64 [ %14, %L57.us.ur ], [ 0, %entry ], [ undef, %for.cond22.for.end_crit_edge.us.ur-lcssa ]
33 %R11_10.0476.us.ur = phi i64 [ %8, %L57.us.ur ], [ 0, %entry ], [ undef, %for.cond22.for.end_crit_edge.us.ur-lcssa ]
34 %R7_6.0475.us.ur = phi i64 [ %7, %L57.us.ur ], [ 0, %entry ], [ undef, %for.cond22.for.end_crit_edge.us.ur-lcssa ]
35 %R5_4.2474.us.ur = phi i64 [ %16, %L57.us.ur ], [ undef, %entry ], [ undef, %for.cond22.for.end_crit_edge.us.ur-lcssa ]
36 %R3_2.0473.us.ur = phi i64 [ %9, %L57.us.ur ], [ 0, %entry ], [ undef, %for.cond22.for.end_crit_edge.us.ur-lcssa ]
37 %R1_0.0472.us.ur = phi i64 [ %15, %L57.us.ur ], [ undef, %entry ], [ undef, %for.cond22.for.end_crit_edge.us.ur-lcssa ]
38 %kk.0471.us.ur = phi i32 [ %inc.us.ur, %L57.us.ur ], [ 0, %entry ], [ %inc.us.3.lcssa, %for.cond22.for.end_crit_edge.us.ur-lcssa ]
39 %R9.0470.us.ur = phi i32 [ %sub40.us.ur, %L57.us.ur ], [ undef, %entry ], [ %sub40.us.3.lcssa, %for.cond22.for.end_crit_edge.us.ur-lcssa ]
40 %R8.0469.us.ur = phi i32 [ %sub34.us.ur, %L57.us.ur ], [ undef, %entry ], [ undef, %for.cond22.for.end_crit_edge.us.ur-lcssa ]
41 %1 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %R15_14.0478.us.ur, i64 %R1_0.0472.us.ur, i64 %R3_2.0473.us.ur)
42 %2 = tail call i64 @llvm.hexagon.S2.shuffeh(i64 %R5_4.2474.us.ur, i64 %R7_6.0475.us.ur)
43 %3 = inttoptr i32 %R9.0470.us.ur to i16*
44 %4 = load i16, i16* %3, align 2
45 %conv27.us.ur = sext i16 %4 to i32
46 %sub28.us.ur = add i32 %R9.0470.us.ur, -8
47 %5 = inttoptr i32 %R8.0469.us.ur to i16*
48 %6 = load i16, i16* %5, align 2
49 %conv30.us.ur = sext i16 %6 to i32
50 %sub31.us.ur = add i32 %R8.0469.us.ur, -8
51 %7 = tail call i64 @llvm.hexagon.A2.combinew(i32 %conv27.us.ur, i32 %conv30.us.ur)
52 %8 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %R11_10.0476.us.ur, i64 %R1_0.0472.us.ur, i64 %2)
53 %9 = tail call i64 @llvm.hexagon.S2.shuffeh(i64 %7, i64 %R5_4.2474.us.ur)
54 %10 = inttoptr i32 %sub31.us.ur to i16*
55 %11 = load i16, i16* %10, align 2
56 %conv33.us.ur = sext i16 %11 to i32
57 %sub34.us.ur = add i32 %R8.0469.us.ur, -16
58 %conv35.us.ur = trunc i64 %9 to i32
59 %12 = inttoptr i32 %sub28.us.ur to i16*
60 %13 = load i16, i16* %12, align 2
61 %conv39.us.ur = sext i16 %13 to i32
62 %sub40.us.ur = add i32 %R9.0470.us.ur, -16
63 %14 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %R13_12.0477.us.ur, i64 %R1_0.0472.us.ur, i64 %9)
64 %15 = tail call i64 @llvm.hexagon.A2.combinew(i32 %conv35.us.ur, i32 undef)
65 %16 = tail call i64 @llvm.hexagon.A2.combinew(i32 %conv39.us.ur, i32 %conv33.us.ur)
66 %inc.us.ur = add nsw i32 %kk.0471.us.ur, 1
67 %exitcond535.ur = icmp eq i32 %inc.us.ur, %shr
68 br i1 %exitcond535.ur, label %for.cond22.for.end_crit_edge.us.ur-lcssa572, label %L57.us.ur
70 for.cond22.for.end_crit_edge.us.ur-lcssa572:
71 %.lcssa730 = phi i64 [ %14, %L57.us.ur ]
72 %.lcssa729 = phi i64 [ %8, %L57.us.ur ]
73 %.lcssa728 = phi i64 [ %1, %L57.us.ur ]
74 %extract.t652 = trunc i64 %.lcssa730 to i32
75 %extract661 = lshr i64 %.lcssa729, 32
76 %extract.t662 = trunc i64 %extract661 to i32
77 %extract.t664 = trunc i64 %.lcssa728 to i32
78 br label %for.cond22.for.end_crit_edge.us
80 for.cond22.for.end_crit_edge.us:
81 %.lcssa551.off0 = phi i32 [ undef, %for.cond22.for.end_crit_edge.us.ur-lcssa ], [ %extract.t652, %for.cond22.for.end_crit_edge.us.ur-lcssa572 ]
82 %.lcssa550.off32 = phi i32 [ undef, %for.cond22.for.end_crit_edge.us.ur-lcssa ], [ %extract.t662, %for.cond22.for.end_crit_edge.us.ur-lcssa572 ]
83 %.lcssa549.off0 = phi i32 [ undef, %for.cond22.for.end_crit_edge.us.ur-lcssa ], [ %extract.t664, %for.cond22.for.end_crit_edge.us.ur-lcssa572 ]
84 %17 = inttoptr i32 %add to i32*
85 store i32 %.lcssa549.off0, i32* %17, align 4
86 %add.ptr61.us = getelementptr inbounds i8, i8* null, i32 32
87 %18 = bitcast i8* %add.ptr61.us to i32*
88 store i32 %.lcssa551.off0, i32* %18, align 4
89 %19 = bitcast i8* undef to i32*
90 store i32 %.lcssa550.off32, i32* %19, align 4
91 call void @llvm.trap()
92 unreachable
93 }
95 ; Function Attrs: nounwind readnone
96 declare i64 @llvm.hexagon.A2.combinew(i32, i32) #1
98 ; Function Attrs: nounwind readnone
99 declare i64 @llvm.hexagon.M2.vdmacs.s0(i64, i64, i64) #1
101 ; Function Attrs: nounwind readnone
102 declare i64 @llvm.hexagon.S2.shuffeh(i64, i64) #1
104 ; Function Attrs: noreturn nounwind
105 declare void @llvm.trap() #2
107 attributes #0 = { nounwind }
108 attributes #1 = { nounwind readnone }
109 attributes #2 = { noreturn nounwind }