1 ; RUN: llc -march=hexagon -O2 < %s
4 ; This file used to fail with an "UNREACHABLE executed!" in Post-RA pseudo
5 ; instruction expansion pass due to a bug in the TwoAddressInstructionPass we
6 ; were not handling sub register indexes when rewriting tied operands.
8 target triple = "hexagon"
10 %0 = type { i8, i8, %1, i32, i32, %7, i8, i8, %8, i8, i32, i16, i16, [2500 x i8], i16, i16, i16, i8*, [1024 x i8], i32, i32, i32, i32, i32, i8 }
11 %1 = type { i8, %2, i8, i8, i32 }
13 %3 = type { i8, [256 x i8], %4, i8, i16, i32 }
16 %6 = type { [2 x i64] }
18 %8 = type { %7, i32, i32, %1 }
19 %9 = type { %10, i8* }
20 %10 = type { i16, i16, i32 }
21 %11 = type { i8, i32 }
23 @g0 = external hidden global [2 x %0], align 8
24 @g1 = external hidden constant %9, align 4
25 @g2 = external hidden constant %9, align 4
26 @g3 = external hidden constant %9, align 4
27 @g4 = external hidden constant %9, align 4
29 ; Function Attrs: optsize
30 declare void @f0(%9*, i32, i32, i32) #0
32 ; Function Attrs: nounwind optsize ssp
33 define hidden fastcc void @f1(i64 %a0, i8 zeroext %a1, i8 zeroext %a2) #1 {
35 %v0 = alloca %11, align 4
36 %v1 = icmp ne i8 %a1, 0
37 %v2 = trunc i64 %a0 to i32
38 br i1 %v1, label %b1, label %b4
41 call void @f0(%9* @g1, i32 %v2, i32 0, i32 0) #2
42 %v3 = getelementptr inbounds [2 x %0], [2 x %0]* @g0, i32 0, i32 %v2, i32 7
43 store i8 1, i8* %v3, align 1
44 %v4 = icmp eq i8 %a2, 0
45 br i1 %v4, label %b4, label %b2
48 %v5 = getelementptr inbounds %11, %11* %v0, i32 0, i32 0
49 store i8 0, i8* %v5, align 4
50 %v6 = getelementptr inbounds %11, %11* %v0, i32 0, i32 1
51 store i32 0, i32* %v6, align 4
52 %v7 = getelementptr inbounds [2 x %0], [2 x %0]* @g0, i32 0, i32 %v2, i32 3
53 %v8 = load i32, i32* %v7, align 8
54 %v9 = getelementptr inbounds [2 x %0], [2 x %0]* @g0, i32 0, i32 %v2, i32 4
55 %v10 = load i32, i32* %v9, align 4
56 %v11 = getelementptr inbounds [2 x %0], [2 x %0]* @g0, i32 0, i32 %v2, i32 19
57 %v12 = load i32, i32* %v11, align 4
58 %v13 = call zeroext i8 @f2(i64 %a0, i32 %v8, i32 %v10, i32 %v12, i8 zeroext 0, %11* %v0) #2
59 %v14 = icmp eq i8 %v13, 0
60 br i1 %v14, label %b4, label %b3
63 %v15 = zext i8 %v13 to i32
64 call void @f0(%9* @g2, i32 %v15, i32 %v2, i32 0) #2
67 b4: ; preds = %b3, %b2, %b1, %b0
68 %v16 = getelementptr inbounds [2 x %0], [2 x %0]* @g0, i32 0, i32 %v2, i32 1
69 %v17 = load i8, i8* %v16, align 1
70 %v18 = zext i8 %v17 to i32
71 switch i32 %v18, label %b14 [
79 call void @f0(%9* @g3, i32 %v2, i32 0, i32 0) #2
80 br i1 %v1, label %b7, label %b6
83 call fastcc void @f3(i64 %a0, i8 zeroext 0, i8 zeroext 1, i32 1) #0
87 call fastcc void @f3(i64 %a0, i8 zeroext 0, i8 zeroext 0, i32 1) #0
91 call void @f0(%9* @g4, i32 %v2, i32 0, i32 0) #2
92 %v19 = getelementptr inbounds [2 x %0], [2 x %0]* @g0, i32 0, i32 %v2, i32 6
93 store i8 1, i8* %v19, align 8
94 br i1 %v1, label %b10, label %b9
97 call fastcc void @f3(i64 %a0, i8 zeroext 0, i8 zeroext 1, i32 1) #0
101 call fastcc void @f3(i64 %a0, i8 zeroext 0, i8 zeroext 0, i32 1) #0
104 b11: ; preds = %b4, %b4
105 br i1 %v1, label %b13, label %b12
108 call fastcc void @f3(i64 %a0, i8 zeroext 0, i8 zeroext 1, i32 1) #0
112 call fastcc void @f3(i64 %a0, i8 zeroext 0, i8 zeroext 0, i32 1) #0
115 b14: ; preds = %b13, %b12, %b10, %b9, %b7, %b6, %b4
119 ; Function Attrs: optsize
120 declare zeroext i8 @f2(i64, i32, i32, i32, i8 zeroext, %11*) #0
122 ; Function Attrs: nounwind optsize ssp
123 declare hidden fastcc void @f3(i64, i8 zeroext, i8 zeroext, i32) #1
125 attributes #0 = { optsize }
126 attributes #1 = { nounwind optsize ssp }
127 attributes #2 = { nounwind optsize }