1 ; RUN: llc -march=hexagon -O3 < %s | FileCheck %s
4 target triple = "hexagon"
6 @g0 = common global [15 x <16 x i32>] zeroinitializer, align 64
7 @g1 = common global [15 x <32 x i32>] zeroinitializer, align 128
9 ; Function Attrs: nounwind
10 define void @f0() #0 {
12 %v0 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 1)
13 store <16 x i32> %v0, <16 x i32>* getelementptr inbounds ([15 x <16 x i32>], [15 x <16 x i32>]* @g0, i32 0, i32 0), align 64, !tbaa !0
14 %v1 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 2)
15 store <16 x i32> %v1, <16 x i32>* getelementptr inbounds ([15 x <16 x i32>], [15 x <16 x i32>]* @g0, i32 0, i32 1), align 64, !tbaa !0
16 %v2 = tail call <32 x i32> @llvm.hexagon.V6.vaddubh(<16 x i32> %v0, <16 x i32> %v1)
17 store <32 x i32> %v2, <32 x i32>* getelementptr inbounds ([15 x <32 x i32>], [15 x <32 x i32>]* @g1, i32 0, i32 0), align 128, !tbaa !0
18 store <32 x i32> %v2, <32 x i32>* getelementptr inbounds ([15 x <32 x i32>], [15 x <32 x i32>]* @g1, i32 0, i32 1), align 128, !tbaa !0
19 %v3 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 3)
20 store <16 x i32> %v3, <16 x i32>* getelementptr inbounds ([15 x <16 x i32>], [15 x <16 x i32>]* @g0, i32 0, i32 2), align 64, !tbaa !0
21 %v4 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 4)
22 store <16 x i32> %v4, <16 x i32>* getelementptr inbounds ([15 x <16 x i32>], [15 x <16 x i32>]* @g0, i32 0, i32 3), align 64, !tbaa !0
23 %v5 = tail call <32 x i32> @llvm.hexagon.V6.vaddubh(<16 x i32> %v3, <16 x i32> %v4)
24 store <32 x i32> %v5, <32 x i32>* getelementptr inbounds ([15 x <32 x i32>], [15 x <32 x i32>]* @g1, i32 0, i32 2), align 128, !tbaa !0
25 store <32 x i32> %v5, <32 x i32>* getelementptr inbounds ([15 x <32 x i32>], [15 x <32 x i32>]* @g1, i32 0, i32 3), align 128, !tbaa !0
26 %v6 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 5)
27 store <16 x i32> %v6, <16 x i32>* getelementptr inbounds ([15 x <16 x i32>], [15 x <16 x i32>]* @g0, i32 0, i32 4), align 64, !tbaa !0
28 %v7 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 6)
29 store <16 x i32> %v7, <16 x i32>* getelementptr inbounds ([15 x <16 x i32>], [15 x <16 x i32>]* @g0, i32 0, i32 5), align 64, !tbaa !0
30 %v8 = tail call <32 x i32> @llvm.hexagon.V6.vaddubh(<16 x i32> %v6, <16 x i32> %v7)
31 store <32 x i32> %v8, <32 x i32>* getelementptr inbounds ([15 x <32 x i32>], [15 x <32 x i32>]* @g1, i32 0, i32 4), align 128, !tbaa !0
32 store <32 x i32> %v8, <32 x i32>* getelementptr inbounds ([15 x <32 x i32>], [15 x <32 x i32>]* @g1, i32 0, i32 5), align 128, !tbaa !0
33 %v9 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 7)
34 store <16 x i32> %v9, <16 x i32>* getelementptr inbounds ([15 x <16 x i32>], [15 x <16 x i32>]* @g0, i32 0, i32 6), align 64, !tbaa !0
35 %v10 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 8)
36 store <16 x i32> %v10, <16 x i32>* getelementptr inbounds ([15 x <16 x i32>], [15 x <16 x i32>]* @g0, i32 0, i32 7), align 64, !tbaa !0
37 %v11 = tail call <32 x i32> @llvm.hexagon.V6.vaddubh(<16 x i32> %v9, <16 x i32> %v10)
38 store <32 x i32> %v11, <32 x i32>* getelementptr inbounds ([15 x <32 x i32>], [15 x <32 x i32>]* @g1, i32 0, i32 6), align 128, !tbaa !0
39 store <32 x i32> %v11, <32 x i32>* getelementptr inbounds ([15 x <32 x i32>], [15 x <32 x i32>]* @g1, i32 0, i32 7), align 128, !tbaa !0
43 ; Function Attrs: nounwind readnone
44 declare <16 x i32> @llvm.hexagon.V6.lvsplatw(i32) #1
46 ; Function Attrs: nounwind readnone
47 declare <32 x i32> @llvm.hexagon.V6.vaddubh(<16 x i32>, <16 x i32>) #1
49 attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }
50 attributes #1 = { nounwind readnone }
53 !1 = !{!"omnipotent char", !2, i64 0}
54 !2 = !{!"Simple C/C++ TBAA"}