1 ; RUN: llc -march=hexagon -mattr="+hvxv60,+hvx-length64b" < %s
4 target triple = "hexagon"
6 ; Function Attrs: nounwind
7 define void @fred() #0 {
12 %cmp10.us = icmp eq i32 0, undef
13 %.h63h32.2.us = select i1 %cmp10.us, <16 x i32> zeroinitializer, <16 x i32> undef
14 %0 = tail call <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32> %.h63h32.2.us, <16 x i32> undef, i32 2)
15 %1 = tail call <32 x i32> @llvm.hexagon.V6.vswap(<512 x i1> undef, <16 x i32> undef, <16 x i32> %0)
16 %2 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %1)
17 %3 = tail call <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32> undef, <16 x i32> %2, i32 62)
18 %4 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %3)
19 store <16 x i32> %4, <16 x i32>* undef, align 64
20 br i1 undef, label %for.body9.us, label %for.body43.us.preheader
22 for.body43.us.preheader: ; preds = %for.body9.us
26 declare <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32>, <16 x i32>, i32) #1
27 declare <32 x i32> @llvm.hexagon.V6.vswap(<512 x i1>, <16 x i32>, <16 x i32>) #1
28 declare <16 x i32> @llvm.hexagon.V6.hi(<32 x i32>) #1
29 declare <16 x i32> @llvm.hexagon.V6.lo(<32 x i32>) #1
30 declare <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32>, <16 x i32>, i32) #1
32 attributes #0 = { nounwind }
33 attributes #1 = { nounwind readnone }