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[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git]
/
test
/
CodeGen
/
Hexagon
/
vsplat-isel.ll
blob
9c5e3e17c4e8a2f04af0cc6d64f7d6c088898721
1
; RUN: llc -march=hexagon -O0 < %s | FileCheck %s
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; CHECK: vsplatb
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declare i32 @llvm.hexagon.S2.vsplatrb(i32) #0
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define i32 @foo(i8 %x) {
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%p0 = zext i8 %x to i32
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%p1 = tail call i32 @llvm.hexagon.S2.vsplatrb(i32 %p0)
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ret i32 %p1
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}