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HEAD
[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git]
/
test
/
CodeGen
/
MIR
/
AMDGPU
/
machine-function-info-register-parse-error2.mir
blob
f3da77e2dec8335bd83790e94c9fc48831fc59bb
1
# RUN: not llc -march=amdgcn -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# CHECK: :7:21: unknown register name 'not_a_register_name'
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# CHECK: scratchRSrcReg: '$not_a_register_name'
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---
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name: invalid_rsrc_reg
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machineFunctionInfo:
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scratchRSrcReg: '$not_a_register_name'
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body: |
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bb.0:
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S_ENDPGM
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...