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HEAD
[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git]
/
test
/
CodeGen
/
MIR
/
X86
/
machine-instructions.mir
blob
1989ee35fb507de44e7e2a363e0b52a0dee77d9f
1
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses X86 machine instructions
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# correctly.
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--- |
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define i32 @inc(i32 %a) {
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entry:
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%b = mul i32 %a, 11
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ret i32 %b
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}
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...
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---
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# CHECK: name: inc
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name: inc
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body: |
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bb.0.entry:
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; CHECK: MOV32rr
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; CHECK-NEXT: RETQ
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$eax = MOV32rr $eax
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RETQ $eax
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...