1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=ppc32 | FileCheck %s
4 declare i32 @llvm.smul.fix.sat.i32 (i32, i32, i32)
6 define i32 @func1(i32 %x, i32 %y) nounwind {
9 ; CHECK-NEXT: lis 5, 32767
10 ; CHECK-NEXT: mulhw. 6, 3, 4
11 ; CHECK-NEXT: lis 7, -32768
12 ; CHECK-NEXT: mullw 3, 3, 4
13 ; CHECK-NEXT: ori 4, 5, 65535
14 ; CHECK-NEXT: srawi 5, 3, 31
15 ; CHECK-NEXT: cmplw 1, 6, 5
16 ; CHECK-NEXT: bc 12, 0, .LBB0_1
17 ; CHECK-NEXT: b .LBB0_2
18 ; CHECK-NEXT: .LBB0_1:
19 ; CHECK-NEXT: addi 4, 7, 0
20 ; CHECK-NEXT: .LBB0_2:
21 ; CHECK-NEXT: bclr 12, 6, 0
22 ; CHECK-NEXT: # %bb.3:
23 ; CHECK-NEXT: ori 3, 4, 0
25 %tmp = call i32 @llvm.smul.fix.sat.i32(i32 %x, i32 %y, i32 0)
29 define i32 @func2(i32 %x, i32 %y) nounwind {
32 ; CHECK-NEXT: mulhw. 6, 3, 4
33 ; CHECK-NEXT: lis 5, 32767
34 ; CHECK-NEXT: mullw 3, 3, 4
35 ; CHECK-NEXT: rotlwi 3, 3, 31
36 ; CHECK-NEXT: ori 4, 5, 65535
37 ; CHECK-NEXT: rlwimi 3, 6, 31, 0, 0
38 ; CHECK-NEXT: bc 12, 1, .LBB1_1
39 ; CHECK-NEXT: b .LBB1_2
40 ; CHECK-NEXT: .LBB1_1:
41 ; CHECK-NEXT: addi 3, 4, 0
42 ; CHECK-NEXT: .LBB1_2:
43 ; CHECK-NEXT: cmpwi 6, -1
44 ; CHECK-NEXT: lis 4, -32768
45 ; CHECK-NEXT: bc 12, 0, .LBB1_3
47 ; CHECK-NEXT: .LBB1_3:
48 ; CHECK-NEXT: addi 3, 4, 0
50 %tmp = call i32 @llvm.smul.fix.sat.i32(i32 %x, i32 %y, i32 1)