1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3 ; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4 ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \
5 ; RUN: --check-prefixes=CHECK,BE
6 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
7 ; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
8 ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \
9 ; RUN: --check-prefixes=CHECK,LE
11 @glob = local_unnamed_addr global i32 0, align 4
13 ; Function Attrs: norecurse nounwind readnone
14 define i64 @test_llgeui(i32 zeroext %a, i32 zeroext %b) {
15 ; CHECK-LABEL: test_llgeui:
16 ; CHECK: # %bb.0: # %entry
17 ; CHECK-NEXT: sub r3, r3, r4
18 ; CHECK-NEXT: not r3, r3
19 ; CHECK-NEXT: rldicl r3, r3, 1, 63
22 %cmp = icmp uge i32 %a, %b
23 %conv1 = zext i1 %cmp to i64
27 ; Function Attrs: norecurse nounwind readnone
28 define i64 @test_llgeui_sext(i32 zeroext %a, i32 zeroext %b) {
29 ; CHECK-LABEL: test_llgeui_sext:
30 ; CHECK: # %bb.0: # %entry
31 ; CHECK-NEXT: sub r3, r3, r4
32 ; CHECK-NEXT: rldicl r3, r3, 1, 63
33 ; CHECK-NEXT: addi r3, r3, -1
36 %cmp = icmp uge i32 %a, %b
37 %conv1 = sext i1 %cmp to i64
41 ; Function Attrs: norecurse nounwind readnone
42 define i64 @test_llgeui_z(i32 zeroext %a) {
43 ; CHECK-LABEL: test_llgeui_z:
44 ; CHECK: # %bb.0: # %entry
45 ; CHECK-NEXT: li r3, 1
48 %cmp = icmp uge i32 %a, 0
49 %conv1 = zext i1 %cmp to i64
53 ; Function Attrs: norecurse nounwind readnone
54 define i64 @test_llgeui_sext_z(i32 zeroext %a) {
55 ; CHECK-LABEL: test_llgeui_sext_z:
56 ; CHECK: # %bb.0: # %entry
57 ; CHECK-NEXT: li r3, -1
60 %cmp = icmp uge i32 %a, 0
61 %conv1 = sext i1 %cmp to i64
65 ; Function Attrs: norecurse nounwind
66 define void @test_llgeui_store(i32 zeroext %a, i32 zeroext %b) {
67 ; BE-LABEL: test_llgeui_store:
68 ; BE: # %bb.0: # %entry
69 ; BE-NEXT: addis r5, r2, .LC0@toc@ha
70 ; BE-NEXT: sub r3, r3, r4
71 ; BE-NEXT: ld r4, .LC0@toc@l(r5)
73 ; BE-NEXT: rldicl r3, r3, 1, 63
74 ; BE-NEXT: stw r3, 0(r4)
77 ; LE-LABEL: test_llgeui_store:
78 ; LE: # %bb.0: # %entry
79 ; LE-NEXT: sub r3, r3, r4
80 ; LE-NEXT: addis r5, r2, glob@toc@ha
82 ; LE-NEXT: rldicl r3, r3, 1, 63
83 ; LE-NEXT: stw r3, glob@toc@l(r5)
86 %cmp = icmp uge i32 %a, %b
87 %conv = zext i1 %cmp to i32
88 store i32 %conv, i32* @glob
90 ; CHECK_LABEL: test_igeuc_store:
93 ; Function Attrs: norecurse nounwind
94 define void @test_llgeui_sext_store(i32 zeroext %a, i32 zeroext %b) {
95 ; BE-LABEL: test_llgeui_sext_store:
96 ; BE: # %bb.0: # %entry
97 ; BE-NEXT: addis r5, r2, .LC0@toc@ha
98 ; BE-NEXT: sub r3, r3, r4
99 ; BE-NEXT: ld r4, .LC0@toc@l(r5)
100 ; BE-NEXT: rldicl r3, r3, 1, 63
101 ; BE-NEXT: addi r3, r3, -1
102 ; BE-NEXT: stw r3, 0(r4)
105 ; LE-LABEL: test_llgeui_sext_store:
106 ; LE: # %bb.0: # %entry
107 ; LE-NEXT: sub r3, r3, r4
108 ; LE-NEXT: addis r5, r2, glob@toc@ha
109 ; LE-NEXT: rldicl r3, r3, 1, 63
110 ; LE-NEXT: addi r3, r3, -1
111 ; LE-NEXT: stw r3, glob@toc@l(r5)
114 %cmp = icmp uge i32 %a, %b
115 %sub = sext i1 %cmp to i32
116 store i32 %sub, i32* @glob
120 ; Function Attrs: norecurse nounwind
121 define void @test_llgeui_z_store(i32 zeroext %a) {
122 ; BE-LABEL: test_llgeui_z_store:
123 ; BE: # %bb.0: # %entry
124 ; BE-NEXT: addis r3, r2, .LC0@toc@ha
126 ; BE-NEXT: ld r3, .LC0@toc@l(r3)
127 ; BE-NEXT: stw r4, 0(r3)
130 ; LE-LABEL: test_llgeui_z_store:
131 ; LE: # %bb.0: # %entry
132 ; LE-NEXT: addis r3, r2, glob@toc@ha
134 ; LE-NEXT: stw r4, glob@toc@l(r3)
137 %cmp = icmp uge i32 %a, 0
138 %sub = zext i1 %cmp to i32
139 store i32 %sub, i32* @glob
143 ; Function Attrs: norecurse nounwind
144 define void @test_llgeui_sext_z_store(i32 zeroext %a) {
145 ; BE-LABEL: test_llgeui_sext_z_store:
146 ; BE: # %bb.0: # %entry
147 ; BE-NEXT: addis r3, r2, .LC0@toc@ha
149 ; BE-NEXT: ld r3, .LC0@toc@l(r3)
150 ; BE-NEXT: stw r4, 0(r3)
153 ; LE-LABEL: test_llgeui_sext_z_store:
154 ; LE: # %bb.0: # %entry
155 ; LE-NEXT: addis r3, r2, glob@toc@ha
157 ; LE-NEXT: stw r4, glob@toc@l(r3)
160 %cmp = icmp uge i32 %a, 0
161 %sub = sext i1 %cmp to i32
162 store i32 %sub, i32* @glob