| blob | ae1b70d0be97af0ecbd066fff78c28271ed3f9f4 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3 ; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
4 ; RUN: FileCheck %s --check-prefix=CHECK-P8
5 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
6 ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
7 ; RUN: FileCheck %s --check-prefix=CHECK-P9
8 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
9 ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
10 ; RUN: FileCheck %s --check-prefix=CHECK-BE
12 define i16 @test2elt(i64 %a.coerce) local_unnamed_addr #0 {
13 ; CHECK-P8-LABEL: test2elt:
14 ; CHECK-P8: # %bb.0: # %entry
15 ; CHECK-P8-NEXT: mtvsrd f0, r3
16 ; CHECK-P8-NEXT: xxswapd v2, vs0
17 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
18 ; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 3
19 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
20 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
21 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
22 ; CHECK-P8-NEXT: mfvsrwz r4, f0
23 ; CHECK-P8-NEXT: mfvsrwz r3, f1
24 ; CHECK-P8-NEXT: mtvsrd f1, r4
25 ; CHECK-P8-NEXT: mtvsrd f0, r3
26 ; CHECK-P8-NEXT: xxswapd v3, vs1
27 ; CHECK-P8-NEXT: xxswapd v2, vs0
28 ; CHECK-P8-NEXT: vmrglb v2, v3, v2
29 ; CHECK-P8-NEXT: xxswapd vs0, v2
30 ; CHECK-P8-NEXT: mfvsrd r3, f0
31 ; CHECK-P8-NEXT: clrldi r3, r3, 48
32 ; CHECK-P8-NEXT: sth r3, -2(r1)
33 ; CHECK-P8-NEXT: lhz r3, -2(r1)
34 ; CHECK-P8-NEXT: blr
35 ;
36 ; CHECK-P9-LABEL: test2elt:
37 ; CHECK-P9: # %bb.0: # %entry
38 ; CHECK-P9-NEXT: mtvsrd f0, r3
39 ; CHECK-P9-NEXT: xxswapd v2, vs0
40 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
41 ; CHECK-P9-NEXT: xxsldwi vs1, v2, v2, 3
42 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
43 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
44 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
45 ; CHECK-P9-NEXT: mfvsrwz r3, f1
46 ; CHECK-P9-NEXT: mtvsrd f1, r3
47 ; CHECK-P9-NEXT: mfvsrwz r3, f0
48 ; CHECK-P9-NEXT: mtvsrd f0, r3
49 ; CHECK-P9-NEXT: xxswapd v2, vs1
50 ; CHECK-P9-NEXT: xxswapd v3, vs0
51 ; CHECK-P9-NEXT: vmrglb v2, v3, v2
52 ; CHECK-P9-NEXT: vsldoi v2, v2, v2, 8
53 ; CHECK-P9-NEXT: addi r3, r1, -2
54 ; CHECK-P9-NEXT: stxsihx v2, 0, r3
55 ; CHECK-P9-NEXT: lhz r3, -2(r1)
56 ; CHECK-P9-NEXT: blr
57 ;
58 ; CHECK-BE-LABEL: test2elt:
59 ; CHECK-BE: # %bb.0: # %entry
60 ; CHECK-BE-NEXT: mtvsrd f0, r3
61 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
62 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
63 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
64 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
65 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
66 ; CHECK-BE-NEXT: mfvsrwz r3, f1
67 ; CHECK-BE-NEXT: sldi r3, r3, 56
68 ; CHECK-BE-NEXT: mtvsrd v2, r3
69 ; CHECK-BE-NEXT: mfvsrwz r3, f0
70 ; CHECK-BE-NEXT: sldi r3, r3, 56
71 ; CHECK-BE-NEXT: mtvsrd v3, r3
72 ; CHECK-BE-NEXT: addi r3, r1, -2
73 ; CHECK-BE-NEXT: vmrghb v2, v2, v3
74 ; CHECK-BE-NEXT: vsldoi v2, v2, v2, 10
75 ; CHECK-BE-NEXT: stxsihx v2, 0, r3
76 ; CHECK-BE-NEXT: lhz r3, -2(r1)
77 ; CHECK-BE-NEXT: blr
78 entry:
79 %0 = bitcast i64 %a.coerce to <2 x float>
80 %1 = fptoui <2 x float> %0 to <2 x i8>
81 %2 = bitcast <2 x i8> %1 to i16
82 ret i16 %2
83 }
85 define i32 @test4elt(<4 x float> %a) local_unnamed_addr #1 {
86 ; CHECK-P8-LABEL: test4elt:
87 ; CHECK-P8: # %bb.0: # %entry
88 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
89 ; CHECK-P8-NEXT: xscvspdpn f1, v2
90 ; CHECK-P8-NEXT: xxswapd vs2, v2
91 ; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1
92 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
93 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
94 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
95 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
96 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
97 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
98 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
99 ; CHECK-P8-NEXT: mfvsrwz r3, f1
100 ; CHECK-P8-NEXT: mtvsrd f1, r3
101 ; CHECK-P8-NEXT: mfvsrwz r3, f0
102 ; CHECK-P8-NEXT: mfvsrwz r4, f2
103 ; CHECK-P8-NEXT: xxswapd v4, vs1
104 ; CHECK-P8-NEXT: mtvsrd f0, r3
105 ; CHECK-P8-NEXT: mfvsrwz r3, f3
106 ; CHECK-P8-NEXT: mtvsrd f2, r4
107 ; CHECK-P8-NEXT: xxswapd v2, vs0
108 ; CHECK-P8-NEXT: mtvsrd f3, r3
109 ; CHECK-P8-NEXT: xxswapd v3, vs2
110 ; CHECK-P8-NEXT: xxswapd v5, vs3
111 ; CHECK-P8-NEXT: vmrglb v2, v3, v2
112 ; CHECK-P8-NEXT: vmrglb v3, v4, v5
113 ; CHECK-P8-NEXT: vmrglh v2, v3, v2
114 ; CHECK-P8-NEXT: xxswapd vs0, v2
115 ; CHECK-P8-NEXT: mfvsrwz r3, f0
116 ; CHECK-P8-NEXT: blr
117 ;
118 ; CHECK-P9-LABEL: test4elt:
119 ; CHECK-P9: # %bb.0: # %entry
120 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3
121 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
122 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
123 ; CHECK-P9-NEXT: mfvsrwz r3, f0
124 ; CHECK-P9-NEXT: mtvsrd f0, r3
125 ; CHECK-P9-NEXT: xxswapd v3, vs0
126 ; CHECK-P9-NEXT: xxswapd vs0, v2
127 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
128 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
129 ; CHECK-P9-NEXT: mfvsrwz r3, f0
130 ; CHECK-P9-NEXT: mtvsrd f0, r3
131 ; CHECK-P9-NEXT: xxswapd v4, vs0
132 ; CHECK-P9-NEXT: xscvspdpn f0, v2
133 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
134 ; CHECK-P9-NEXT: mfvsrwz r3, f0
135 ; CHECK-P9-NEXT: mtvsrd f0, r3
136 ; CHECK-P9-NEXT: vmrglb v3, v4, v3
137 ; CHECK-P9-NEXT: xxswapd v4, vs0
138 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 1
139 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
140 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
141 ; CHECK-P9-NEXT: mfvsrwz r3, f0
142 ; CHECK-P9-NEXT: mtvsrd f0, r3
143 ; CHECK-P9-NEXT: li r3, 0
144 ; CHECK-P9-NEXT: xxswapd v2, vs0
145 ; CHECK-P9-NEXT: vmrglb v2, v4, v2
146 ; CHECK-P9-NEXT: vmrglh v2, v2, v3
147 ; CHECK-P9-NEXT: vextuwrx r3, r3, v2
148 ; CHECK-P9-NEXT: blr
149 ;
150 ; CHECK-BE-LABEL: test4elt:
151 ; CHECK-BE: # %bb.0: # %entry
152 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 3
153 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
154 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
155 ; CHECK-BE-NEXT: mfvsrwz r3, f0
156 ; CHECK-BE-NEXT: xxswapd vs0, v2
157 ; CHECK-BE-NEXT: sldi r3, r3, 56
158 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
159 ; CHECK-BE-NEXT: mtvsrd v3, r3
160 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
161 ; CHECK-BE-NEXT: mfvsrwz r3, f0
162 ; CHECK-BE-NEXT: xscvspdpn f0, v2
163 ; CHECK-BE-NEXT: sldi r3, r3, 56
164 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
165 ; CHECK-BE-NEXT: mtvsrd v4, r3
166 ; CHECK-BE-NEXT: vmrghb v3, v4, v3
167 ; CHECK-BE-NEXT: mfvsrwz r3, f0
168 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 1
169 ; CHECK-BE-NEXT: sldi r3, r3, 56
170 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
171 ; CHECK-BE-NEXT: mtvsrd v4, r3
172 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
173 ; CHECK-BE-NEXT: mfvsrwz r3, f0
174 ; CHECK-BE-NEXT: sldi r3, r3, 56
175 ; CHECK-BE-NEXT: mtvsrd v2, r3
176 ; CHECK-BE-NEXT: li r3, 0
177 ; CHECK-BE-NEXT: vmrghb v2, v4, v2
178 ; CHECK-BE-NEXT: vmrghh v2, v2, v3
179 ; CHECK-BE-NEXT: vextuwlx r3, r3, v2
180 ; CHECK-BE-NEXT: blr
181 entry:
182 %0 = fptoui <4 x float> %a to <4 x i8>
183 %1 = bitcast <4 x i8> %0 to i32
184 ret i32 %1
185 }
187 define i64 @test8elt(<8 x float>* nocapture readonly) local_unnamed_addr #2 {
188 ; CHECK-P8-LABEL: test8elt:
189 ; CHECK-P8: # %bb.0: # %entry
190 ; CHECK-P8-NEXT: lvx v2, 0, r3
191 ; CHECK-P8-NEXT: li r4, 16
192 ; CHECK-P8-NEXT: lvx v5, r3, r4
193 ; CHECK-P8-NEXT: xxswapd vs1, v2
194 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
195 ; CHECK-P8-NEXT: xxsldwi vs2, v5, v5, 3
196 ; CHECK-P8-NEXT: xscvspdpn f4, v5
197 ; CHECK-P8-NEXT: xxswapd vs3, v5
198 ; CHECK-P8-NEXT: xxsldwi vs5, v5, v5, 1
199 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
200 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
201 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
202 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
203 ; CHECK-P8-NEXT: xscvspdpn f5, vs5
204 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
205 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
206 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
207 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
208 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
209 ; CHECK-P8-NEXT: xscvdpsxws f5, f5
210 ; CHECK-P8-NEXT: mfvsrwz r4, f4
211 ; CHECK-P8-NEXT: mfvsrwz r6, f1
212 ; CHECK-P8-NEXT: mfvsrwz r5, f0
213 ; CHECK-P8-NEXT: mtvsrd f1, r6
214 ; CHECK-P8-NEXT: mtvsrd f0, r5
215 ; CHECK-P8-NEXT: xxswapd v4, vs1
216 ; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 1
217 ; CHECK-P8-NEXT: xxswapd v3, vs0
218 ; CHECK-P8-NEXT: xscvspdpn f0, v2
219 ; CHECK-P8-NEXT: mtvsrd f4, r4
220 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
221 ; CHECK-P8-NEXT: mfvsrwz r4, f2
222 ; CHECK-P8-NEXT: xxswapd v1, vs4
223 ; CHECK-P8-NEXT: vmrglb v2, v4, v3
224 ; CHECK-P8-NEXT: mtvsrd f2, r4
225 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
226 ; CHECK-P8-NEXT: mfvsrwz r4, f5
227 ; CHECK-P8-NEXT: xxswapd v5, vs2
228 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
229 ; CHECK-P8-NEXT: mfvsrwz r3, f0
230 ; CHECK-P8-NEXT: mtvsrd f0, r3
231 ; CHECK-P8-NEXT: mfvsrwz r3, f1
232 ; CHECK-P8-NEXT: xxswapd v3, vs0
233 ; CHECK-P8-NEXT: mtvsrd f1, r3
234 ; CHECK-P8-NEXT: mfvsrwz r3, f3
235 ; CHECK-P8-NEXT: mtvsrd f3, r4
236 ; CHECK-P8-NEXT: xxswapd v4, vs1
237 ; CHECK-P8-NEXT: mtvsrd f0, r3
238 ; CHECK-P8-NEXT: xxswapd v6, vs3
239 ; CHECK-P8-NEXT: xxswapd v0, vs0
240 ; CHECK-P8-NEXT: vmrglb v3, v3, v4
241 ; CHECK-P8-NEXT: vmrglb v4, v0, v5
242 ; CHECK-P8-NEXT: vmrglb v5, v1, v6
243 ; CHECK-P8-NEXT: vmrglh v2, v3, v2
244 ; CHECK-P8-NEXT: vmrglh v3, v5, v4
245 ; CHECK-P8-NEXT: vmrglw v2, v3, v2
246 ; CHECK-P8-NEXT: xxswapd vs0, v2
247 ; CHECK-P8-NEXT: mfvsrd r3, f0
248 ; CHECK-P8-NEXT: blr
249 ;
250 ; CHECK-P9-LABEL: test8elt:
251 ; CHECK-P9: # %bb.0: # %entry
252 ; CHECK-P9-NEXT: lxv vs1, 0(r3)
253 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
254 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
255 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
256 ; CHECK-P9-NEXT: lxv vs0, 16(r3)
257 ; CHECK-P9-NEXT: mfvsrwz r3, f2
258 ; CHECK-P9-NEXT: mtvsrd f2, r3
259 ; CHECK-P9-NEXT: xxswapd v2, vs2
260 ; CHECK-P9-NEXT: xxswapd vs2, vs1
261 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
262 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
263 ; CHECK-P9-NEXT: mfvsrwz r3, f2
264 ; CHECK-P9-NEXT: mtvsrd f2, r3
265 ; CHECK-P9-NEXT: xxswapd v3, vs2
266 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
267 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
268 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
269 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
270 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
271 ; CHECK-P9-NEXT: mfvsrwz r3, f2
272 ; CHECK-P9-NEXT: mtvsrd f2, r3
273 ; CHECK-P9-NEXT: mfvsrwz r3, f1
274 ; CHECK-P9-NEXT: mtvsrd f1, r3
275 ; CHECK-P9-NEXT: xxswapd v4, vs1
276 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
277 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
278 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
279 ; CHECK-P9-NEXT: vmrglb v2, v3, v2
280 ; CHECK-P9-NEXT: xxswapd v3, vs2
281 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
282 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
283 ; CHECK-P9-NEXT: mfvsrwz r3, f1
284 ; CHECK-P9-NEXT: mtvsrd f1, r3
285 ; CHECK-P9-NEXT: xxswapd v3, vs1
286 ; CHECK-P9-NEXT: xxswapd vs1, vs0
287 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
288 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
289 ; CHECK-P9-NEXT: mfvsrwz r3, f1
290 ; CHECK-P9-NEXT: mtvsrd f1, r3
291 ; CHECK-P9-NEXT: xxswapd v4, vs1
292 ; CHECK-P9-NEXT: xscvspdpn f1, vs0
293 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
294 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
295 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
296 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
297 ; CHECK-P9-NEXT: mfvsrwz r3, f1
298 ; CHECK-P9-NEXT: mtvsrd f1, r3
299 ; CHECK-P9-NEXT: mfvsrwz r3, f0
300 ; CHECK-P9-NEXT: mtvsrd f0, r3
301 ; CHECK-P9-NEXT: vmrglb v3, v4, v3
302 ; CHECK-P9-NEXT: xxswapd v4, vs1
303 ; CHECK-P9-NEXT: xxswapd v5, vs0
304 ; CHECK-P9-NEXT: vmrglb v4, v4, v5
305 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
306 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
307 ; CHECK-P9-NEXT: mfvsrld r3, v2
308 ; CHECK-P9-NEXT: blr
309 ;
310 ; CHECK-BE-LABEL: test8elt:
311 ; CHECK-BE: # %bb.0: # %entry
312 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
313 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
314 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
315 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
316 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
317 ; CHECK-BE-NEXT: mfvsrwz r3, f2
318 ; CHECK-BE-NEXT: xxswapd vs2, vs1
319 ; CHECK-BE-NEXT: sldi r3, r3, 56
320 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
321 ; CHECK-BE-NEXT: mtvsrd v2, r3
322 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
323 ; CHECK-BE-NEXT: mfvsrwz r3, f2
324 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
325 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
326 ; CHECK-BE-NEXT: sldi r3, r3, 56
327 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
328 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
329 ; CHECK-BE-NEXT: mtvsrd v3, r3
330 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
331 ; CHECK-BE-NEXT: vmrghb v2, v3, v2
332 ; CHECK-BE-NEXT: mfvsrwz r3, f2
333 ; CHECK-BE-NEXT: sldi r3, r3, 56
334 ; CHECK-BE-NEXT: mtvsrd v3, r3
335 ; CHECK-BE-NEXT: mfvsrwz r3, f1
336 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3
337 ; CHECK-BE-NEXT: sldi r3, r3, 56
338 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
339 ; CHECK-BE-NEXT: mtvsrd v4, r3
340 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
341 ; CHECK-BE-NEXT: mfvsrwz r3, f1
342 ; CHECK-BE-NEXT: xxswapd vs1, vs0
343 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
344 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
345 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
346 ; CHECK-BE-NEXT: sldi r3, r3, 56
347 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
348 ; CHECK-BE-NEXT: mtvsrd v3, r3
349 ; CHECK-BE-NEXT: mfvsrwz r3, f1
350 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
351 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
352 ; CHECK-BE-NEXT: sldi r3, r3, 56
353 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
354 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
355 ; CHECK-BE-NEXT: mtvsrd v4, r3
356 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
357 ; CHECK-BE-NEXT: vmrghb v3, v4, v3
358 ; CHECK-BE-NEXT: mfvsrwz r3, f1
359 ; CHECK-BE-NEXT: sldi r3, r3, 56
360 ; CHECK-BE-NEXT: mtvsrd v4, r3
361 ; CHECK-BE-NEXT: mfvsrwz r3, f0
362 ; CHECK-BE-NEXT: sldi r3, r3, 56
363 ; CHECK-BE-NEXT: mtvsrd v5, r3
364 ; CHECK-BE-NEXT: vmrghb v4, v4, v5
365 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
366 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
367 ; CHECK-BE-NEXT: mfvsrd r3, v2
368 ; CHECK-BE-NEXT: blr
369 entry:
370 %a = load <8 x float>, <8 x float>* %0, align 32
371 %1 = fptoui <8 x float> %a to <8 x i8>
372 %2 = bitcast <8 x i8> %1 to i64
373 ret i64 %2
374 }
376 define <16 x i8> @test16elt(<16 x float>* nocapture readonly) local_unnamed_addr #3 {
377 ; CHECK-P8-LABEL: test16elt:
378 ; CHECK-P8: # %bb.0: # %entry
379 ; CHECK-P8-NEXT: lvx v2, 0, r3
380 ; CHECK-P8-NEXT: li r4, 16
381 ; CHECK-P8-NEXT: lvx v3, r3, r4
382 ; CHECK-P8-NEXT: li r4, 32
383 ; CHECK-P8-NEXT: xscvspdpn f2, v2
384 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
385 ; CHECK-P8-NEXT: xscvspdpn f4, v3
386 ; CHECK-P8-NEXT: xxswapd vs1, v2
387 ; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1
388 ; CHECK-P8-NEXT: xxsldwi vs5, v3, v3, 3
389 ; CHECK-P8-NEXT: lvx v2, r3, r4
390 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
391 ; CHECK-P8-NEXT: xxswapd vs6, v3
392 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
393 ; CHECK-P8-NEXT: xxsldwi vs7, v3, v3, 1
394 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
395 ; CHECK-P8-NEXT: xxsldwi vs8, v2, v2, 3
396 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
397 ; CHECK-P8-NEXT: xxswapd vs9, v2
398 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
399 ; CHECK-P8-NEXT: xscvspdpn f5, vs5
400 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
401 ; CHECK-P8-NEXT: xscvspdpn f6, vs6
402 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
403 ; CHECK-P8-NEXT: mfvsrwz r4, f2
404 ; CHECK-P8-NEXT: xscvspdpn f7, vs7
405 ; CHECK-P8-NEXT: mtvsrd f2, r4
406 ; CHECK-P8-NEXT: mfvsrwz r4, f4
407 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
408 ; CHECK-P8-NEXT: xscvspdpn f8, vs8
409 ; CHECK-P8-NEXT: mtvsrd f4, r4
410 ; CHECK-P8-NEXT: mfvsrwz r4, f0
411 ; CHECK-P8-NEXT: xscvdpsxws f0, f5
412 ; CHECK-P8-NEXT: xxswapd v0, vs4
413 ; CHECK-P8-NEXT: xscvspdpn f9, vs9
414 ; CHECK-P8-NEXT: mtvsrd f5, r4
415 ; CHECK-P8-NEXT: mfvsrwz r4, f1
416 ; CHECK-P8-NEXT: xscvdpsxws f1, f6
417 ; CHECK-P8-NEXT: xxswapd v3, vs5
418 ; CHECK-P8-NEXT: mtvsrd f6, r4
419 ; CHECK-P8-NEXT: mfvsrwz r4, f3
420 ; CHECK-P8-NEXT: xscvdpsxws f3, f7
421 ; CHECK-P8-NEXT: xxswapd v4, vs6
422 ; CHECK-P8-NEXT: mtvsrd f7, r4
423 ; CHECK-P8-NEXT: mfvsrwz r4, f0
424 ; CHECK-P8-NEXT: xscvdpsxws f0, f8
425 ; CHECK-P8-NEXT: xxswapd v5, vs7
426 ; CHECK-P8-NEXT: mtvsrd f8, r4
427 ; CHECK-P8-NEXT: mfvsrwz r4, f1
428 ; CHECK-P8-NEXT: xscvdpsxws f1, f9
429 ; CHECK-P8-NEXT: xxswapd v1, vs8
430 ; CHECK-P8-NEXT: mtvsrd f9, r4
431 ; CHECK-P8-NEXT: mfvsrwz r4, f3
432 ; CHECK-P8-NEXT: vmrglb v3, v4, v3
433 ; CHECK-P8-NEXT: xxswapd v4, vs2
434 ; CHECK-P8-NEXT: mtvsrd f3, r4
435 ; CHECK-P8-NEXT: xxswapd v6, vs9
436 ; CHECK-P8-NEXT: mfvsrwz r4, f0
437 ; CHECK-P8-NEXT: xscvspdpn f0, v2
438 ; CHECK-P8-NEXT: xxswapd v7, vs3
439 ; CHECK-P8-NEXT: mtvsrd f5, r4
440 ; CHECK-P8-NEXT: mfvsrwz r4, f1
441 ; CHECK-P8-NEXT: vmrglb v4, v4, v5
442 ; CHECK-P8-NEXT: xxswapd v5, vs5
443 ; CHECK-P8-NEXT: mtvsrd f1, r4
444 ; CHECK-P8-NEXT: li r4, 48
445 ; CHECK-P8-NEXT: lvx v9, r3, r4
446 ; CHECK-P8-NEXT: vmrglb v1, v6, v1
447 ; CHECK-P8-NEXT: xxswapd v8, vs1
448 ; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 1
449 ; CHECK-P8-NEXT: xxsldwi vs2, v9, v9, 3
450 ; CHECK-P8-NEXT: xscvspdpn f4, v9
451 ; CHECK-P8-NEXT: xxswapd vs3, v9
452 ; CHECK-P8-NEXT: xxsldwi vs5, v9, v9, 1
453 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
454 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
455 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
456 ; CHECK-P8-NEXT: xscvspdpn f5, vs5
457 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
458 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
459 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
460 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
461 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
462 ; CHECK-P8-NEXT: xscvdpsxws f5, f5
463 ; CHECK-P8-NEXT: mfvsrwz r3, f0
464 ; CHECK-P8-NEXT: mfvsrwz r4, f4
465 ; CHECK-P8-NEXT: mtvsrd f0, r3
466 ; CHECK-P8-NEXT: mtvsrd f4, r4
467 ; CHECK-P8-NEXT: mfvsrwz r3, f1
468 ; CHECK-P8-NEXT: mfvsrwz r4, f2
469 ; CHECK-P8-NEXT: xxswapd v9, vs4
470 ; CHECK-P8-NEXT: mtvsrd f1, r3
471 ; CHECK-P8-NEXT: mfvsrwz r3, f3
472 ; CHECK-P8-NEXT: mtvsrd f2, r4
473 ; CHECK-P8-NEXT: xxswapd v6, vs1
474 ; CHECK-P8-NEXT: mfvsrwz r4, f5
475 ; CHECK-P8-NEXT: vmrglb v2, v0, v7
476 ; CHECK-P8-NEXT: xxswapd v0, vs0
477 ; CHECK-P8-NEXT: mtvsrd f0, r3
478 ; CHECK-P8-NEXT: xxswapd v7, vs2
479 ; CHECK-P8-NEXT: mtvsrd f3, r4
480 ; CHECK-P8-NEXT: vmrglb v5, v8, v5
481 ; CHECK-P8-NEXT: xxswapd v8, vs0
482 ; CHECK-P8-NEXT: xxswapd v10, vs3
483 ; CHECK-P8-NEXT: vmrglb v0, v0, v6
484 ; CHECK-P8-NEXT: vmrglh v3, v4, v3
485 ; CHECK-P8-NEXT: vmrglb v6, v8, v7
486 ; CHECK-P8-NEXT: vmrglb v7, v9, v10
487 ; CHECK-P8-NEXT: vmrglh v2, v2, v1
488 ; CHECK-P8-NEXT: vmrglh v4, v0, v5
489 ; CHECK-P8-NEXT: vmrglh v5, v7, v6
490 ; CHECK-P8-NEXT: vmrglw v2, v2, v3
491 ; CHECK-P8-NEXT: vmrglw v3, v5, v4
492 ; CHECK-P8-NEXT: xxmrgld v2, v3, v2
493 ; CHECK-P8-NEXT: blr
494 ;
495 ; CHECK-P9-LABEL: test16elt:
496 ; CHECK-P9: # %bb.0: # %entry
497 ; CHECK-P9-NEXT: lxv vs2, 0(r3)
498 ; CHECK-P9-NEXT: xxsldwi vs3, vs2, vs2, 3
499 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
500 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
501 ; CHECK-P9-NEXT: lxv vs0, 48(r3)
502 ; CHECK-P9-NEXT: lxv vs1, 32(r3)
503 ; CHECK-P9-NEXT: lxv vs4, 16(r3)
504 ; CHECK-P9-NEXT: mfvsrwz r3, f3
505 ; CHECK-P9-NEXT: mtvsrd f3, r3
506 ; CHECK-P9-NEXT: xxswapd v2, vs3
507 ; CHECK-P9-NEXT: xxswapd vs3, vs2
508 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
509 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
510 ; CHECK-P9-NEXT: mfvsrwz r3, f3
511 ; CHECK-P9-NEXT: mtvsrd f3, r3
512 ; CHECK-P9-NEXT: xxswapd v3, vs3
513 ; CHECK-P9-NEXT: xscvspdpn f3, vs2
514 ; CHECK-P9-NEXT: xxsldwi vs2, vs2, vs2, 1
515 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
516 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
517 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
518 ; CHECK-P9-NEXT: mfvsrwz r3, f3
519 ; CHECK-P9-NEXT: mtvsrd f3, r3
520 ; CHECK-P9-NEXT: mfvsrwz r3, f2
521 ; CHECK-P9-NEXT: mtvsrd f2, r3
522 ; CHECK-P9-NEXT: xxswapd v4, vs2
523 ; CHECK-P9-NEXT: xxsldwi vs2, vs4, vs4, 3
524 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
525 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
526 ; CHECK-P9-NEXT: vmrglb v2, v3, v2
527 ; CHECK-P9-NEXT: xxswapd v3, vs3
528 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
529 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
530 ; CHECK-P9-NEXT: mfvsrwz r3, f2
531 ; CHECK-P9-NEXT: mtvsrd f2, r3
532 ; CHECK-P9-NEXT: xxswapd v3, vs2
533 ; CHECK-P9-NEXT: xxswapd vs2, vs4
534 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
535 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
536 ; CHECK-P9-NEXT: mfvsrwz r3, f2
537 ; CHECK-P9-NEXT: mtvsrd f2, r3
538 ; CHECK-P9-NEXT: xxswapd v4, vs2
539 ; CHECK-P9-NEXT: xscvspdpn f2, vs4
540 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
541 ; CHECK-P9-NEXT: mfvsrwz r3, f2
542 ; CHECK-P9-NEXT: mtvsrd f2, r3
543 ; CHECK-P9-NEXT: vmrglb v3, v4, v3
544 ; CHECK-P9-NEXT: xxswapd v4, vs2
545 ; CHECK-P9-NEXT: xxsldwi vs2, vs4, vs4, 1
546 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
547 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
548 ; CHECK-P9-NEXT: mfvsrwz r3, f2
549 ; CHECK-P9-NEXT: mtvsrd f2, r3
550 ; CHECK-P9-NEXT: xxswapd v5, vs2
551 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
552 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
553 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
554 ; CHECK-P9-NEXT: vmrglb v4, v4, v5
555 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
556 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
557 ; CHECK-P9-NEXT: mfvsrwz r3, f2
558 ; CHECK-P9-NEXT: mtvsrd f2, r3
559 ; CHECK-P9-NEXT: xxswapd v3, vs2
560 ; CHECK-P9-NEXT: xxswapd vs2, vs1
561 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
562 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
563 ; CHECK-P9-NEXT: mfvsrwz r3, f2
564 ; CHECK-P9-NEXT: mtvsrd f2, r3
565 ; CHECK-P9-NEXT: xxswapd v4, vs2
566 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
567 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
568 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
569 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
570 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
571 ; CHECK-P9-NEXT: mfvsrwz r3, f2
572 ; CHECK-P9-NEXT: mtvsrd f2, r3
573 ; CHECK-P9-NEXT: mfvsrwz r3, f1
574 ; CHECK-P9-NEXT: mtvsrd f1, r3
575 ; CHECK-P9-NEXT: xxswapd v5, vs1
576 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
577 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
578 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
579 ; CHECK-P9-NEXT: vmrglb v3, v4, v3
580 ; CHECK-P9-NEXT: xxswapd v4, vs2
581 ; CHECK-P9-NEXT: vmrglb v4, v4, v5
582 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
583 ; CHECK-P9-NEXT: mfvsrwz r3, f1
584 ; CHECK-P9-NEXT: mtvsrd f1, r3
585 ; CHECK-P9-NEXT: xxswapd v4, vs1
586 ; CHECK-P9-NEXT: xxswapd vs1, vs0
587 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
588 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
589 ; CHECK-P9-NEXT: mfvsrwz r3, f1
590 ; CHECK-P9-NEXT: mtvsrd f1, r3
591 ; CHECK-P9-NEXT: xxswapd v5, vs1
592 ; CHECK-P9-NEXT: xscvspdpn f1, vs0
593 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
594 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
595 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
596 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
597 ; CHECK-P9-NEXT: mfvsrwz r3, f1
598 ; CHECK-P9-NEXT: mtvsrd f1, r3
599 ; CHECK-P9-NEXT: mfvsrwz r3, f0
600 ; CHECK-P9-NEXT: mtvsrd f0, r3
601 ; CHECK-P9-NEXT: vmrglb v4, v5, v4
602 ; CHECK-P9-NEXT: xxswapd v5, vs1
603 ; CHECK-P9-NEXT: xxswapd v0, vs0
604 ; CHECK-P9-NEXT: vmrglb v5, v5, v0
605 ; CHECK-P9-NEXT: vmrglh v4, v5, v4
606 ; CHECK-P9-NEXT: vmrglw v3, v4, v3
607 ; CHECK-P9-NEXT: xxmrgld v2, v3, v2
608 ; CHECK-P9-NEXT: blr
609 ;
610 ; CHECK-BE-LABEL: test16elt:
611 ; CHECK-BE: # %bb.0: # %entry
612 ; CHECK-BE-NEXT: lxv vs3, 48(r3)
613 ; CHECK-BE-NEXT: xxsldwi vs4, vs3, vs3, 3
614 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
615 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
616 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
617 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
618 ; CHECK-BE-NEXT: lxv vs2, 32(r3)
619 ; CHECK-BE-NEXT: mfvsrwz r3, f4
620 ; CHECK-BE-NEXT: xxswapd vs4, vs3
621 ; CHECK-BE-NEXT: sldi r3, r3, 56
622 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
623 ; CHECK-BE-NEXT: mtvsrd v2, r3
624 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
625 ; CHECK-BE-NEXT: mfvsrwz r3, f4
626 ; CHECK-BE-NEXT: xscvspdpn f4, vs3
627 ; CHECK-BE-NEXT: xxsldwi vs3, vs3, vs3, 1
628 ; CHECK-BE-NEXT: sldi r3, r3, 56
629 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
630 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
631 ; CHECK-BE-NEXT: mtvsrd v3, r3
632 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
633 ; CHECK-BE-NEXT: vmrghb v2, v3, v2
634 ; CHECK-BE-NEXT: mfvsrwz r3, f4
635 ; CHECK-BE-NEXT: sldi r3, r3, 56
636 ; CHECK-BE-NEXT: mtvsrd v3, r3
637 ; CHECK-BE-NEXT: mfvsrwz r3, f3
638 ; CHECK-BE-NEXT: xxsldwi vs3, vs2, vs2, 3
639 ; CHECK-BE-NEXT: sldi r3, r3, 56
640 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
641 ; CHECK-BE-NEXT: mtvsrd v4, r3
642 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
643 ; CHECK-BE-NEXT: mfvsrwz r3, f3
644 ; CHECK-BE-NEXT: xxswapd vs3, vs2
645 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
646 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
647 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
648 ; CHECK-BE-NEXT: sldi r3, r3, 56
649 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
650 ; CHECK-BE-NEXT: mtvsrd v3, r3
651 ; CHECK-BE-NEXT: mfvsrwz r3, f3
652 ; CHECK-BE-NEXT: xscvspdpn f3, vs2
653 ; CHECK-BE-NEXT: xxsldwi vs2, vs2, vs2, 1
654 ; CHECK-BE-NEXT: sldi r3, r3, 56
655 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
656 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
657 ; CHECK-BE-NEXT: mtvsrd v4, r3
658 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
659 ; CHECK-BE-NEXT: vmrghb v3, v4, v3
660 ; CHECK-BE-NEXT: mfvsrwz r3, f3
661 ; CHECK-BE-NEXT: sldi r3, r3, 56
662 ; CHECK-BE-NEXT: mtvsrd v4, r3
663 ; CHECK-BE-NEXT: mfvsrwz r3, f2
664 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
665 ; CHECK-BE-NEXT: sldi r3, r3, 56
666 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
667 ; CHECK-BE-NEXT: mtvsrd v5, r3
668 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
669 ; CHECK-BE-NEXT: mfvsrwz r3, f2
670 ; CHECK-BE-NEXT: xxswapd vs2, vs1
671 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
672 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
673 ; CHECK-BE-NEXT: vmrghb v4, v4, v5
674 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
675 ; CHECK-BE-NEXT: sldi r3, r3, 56
676 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
677 ; CHECK-BE-NEXT: mtvsrd v3, r3
678 ; CHECK-BE-NEXT: mfvsrwz r3, f2
679 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
680 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
681 ; CHECK-BE-NEXT: sldi r3, r3, 56
682 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
683 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
684 ; CHECK-BE-NEXT: mtvsrd v4, r3
685 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
686 ; CHECK-BE-NEXT: vmrghb v3, v4, v3
687 ; CHECK-BE-NEXT: mfvsrwz r3, f2
688 ; CHECK-BE-NEXT: sldi r3, r3, 56
689 ; CHECK-BE-NEXT: mtvsrd v4, r3
690 ; CHECK-BE-NEXT: mfvsrwz r3, f1
691 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3
692 ; CHECK-BE-NEXT: sldi r3, r3, 56
693 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
694 ; CHECK-BE-NEXT: mtvsrd v5, r3
695 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
696 ; CHECK-BE-NEXT: mfvsrwz r3, f1
697 ; CHECK-BE-NEXT: xxswapd vs1, vs0
698 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
699 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
700 ; CHECK-BE-NEXT: vmrghb v4, v4, v5
701 ; CHECK-BE-NEXT: sldi r3, r3, 56
702 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
703 ; CHECK-BE-NEXT: mtvsrd v4, r3
704 ; CHECK-BE-NEXT: mfvsrwz r3, f1
705 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
706 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
707 ; CHECK-BE-NEXT: sldi r3, r3, 56
708 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
709 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
710 ; CHECK-BE-NEXT: mtvsrd v5, r3
711 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
712 ; CHECK-BE-NEXT: vmrghb v4, v5, v4
713 ; CHECK-BE-NEXT: mfvsrwz r3, f1
714 ; CHECK-BE-NEXT: sldi r3, r3, 56
715 ; CHECK-BE-NEXT: mtvsrd v5, r3
716 ; CHECK-BE-NEXT: mfvsrwz r3, f0
717 ; CHECK-BE-NEXT: sldi r3, r3, 56
718 ; CHECK-BE-NEXT: mtvsrd v0, r3
719 ; CHECK-BE-NEXT: vmrghb v5, v5, v0
720 ; CHECK-BE-NEXT: vmrghh v4, v5, v4
721 ; CHECK-BE-NEXT: vmrghw v3, v4, v3
722 ; CHECK-BE-NEXT: xxmrghd v2, v3, v2
723 ; CHECK-BE-NEXT: blr
724 entry:
725 %a = load <16 x float>, <16 x float>* %0, align 64
726 %1 = fptoui <16 x float> %a to <16 x i8>
727 ret <16 x i8> %1
728 }
730 define i16 @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {
731 ; CHECK-P8-LABEL: test2elt_signed:
732 ; CHECK-P8: # %bb.0: # %entry
733 ; CHECK-P8-NEXT: mtvsrd f0, r3
734 ; CHECK-P8-NEXT: xxswapd v2, vs0
735 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
736 ; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 3
737 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
738 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
739 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
740 ; CHECK-P8-NEXT: mfvsrwz r4, f0
741 ; CHECK-P8-NEXT: mfvsrwz r3, f1
742 ; CHECK-P8-NEXT: mtvsrd f1, r4
743 ; CHECK-P8-NEXT: mtvsrd f0, r3
744 ; CHECK-P8-NEXT: xxswapd v3, vs1
745 ; CHECK-P8-NEXT: xxswapd v2, vs0
746 ; CHECK-P8-NEXT: vmrglb v2, v3, v2
747 ; CHECK-P8-NEXT: xxswapd vs0, v2
748 ; CHECK-P8-NEXT: mfvsrd r3, f0
749 ; CHECK-P8-NEXT: clrldi r3, r3, 48
750 ; CHECK-P8-NEXT: sth r3, -2(r1)
751 ; CHECK-P8-NEXT: lhz r3, -2(r1)
752 ; CHECK-P8-NEXT: blr
753 ;
754 ; CHECK-P9-LABEL: test2elt_signed:
755 ; CHECK-P9: # %bb.0: # %entry
756 ; CHECK-P9-NEXT: mtvsrd f0, r3
757 ; CHECK-P9-NEXT: xxswapd v2, vs0
758 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
759 ; CHECK-P9-NEXT: xxsldwi vs1, v2, v2, 3
760 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
761 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
762 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
763 ; CHECK-P9-NEXT: mfvsrwz r3, f1
764 ; CHECK-P9-NEXT: mtvsrd f1, r3
765 ; CHECK-P9-NEXT: mfvsrwz r3, f0
766 ; CHECK-P9-NEXT: mtvsrd f0, r3
767 ; CHECK-P9-NEXT: xxswapd v2, vs1
768 ; CHECK-P9-NEXT: xxswapd v3, vs0
769 ; CHECK-P9-NEXT: vmrglb v2, v3, v2
770 ; CHECK-P9-NEXT: vsldoi v2, v2, v2, 8
771 ; CHECK-P9-NEXT: addi r3, r1, -2
772 ; CHECK-P9-NEXT: stxsihx v2, 0, r3
773 ; CHECK-P9-NEXT: lhz r3, -2(r1)
774 ; CHECK-P9-NEXT: blr
775 ;
776 ; CHECK-BE-LABEL: test2elt_signed:
777 ; CHECK-BE: # %bb.0: # %entry
778 ; CHECK-BE-NEXT: mtvsrd f0, r3
779 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
780 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
781 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
782 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
783 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
784 ; CHECK-BE-NEXT: mfvsrwz r3, f1
785 ; CHECK-BE-NEXT: sldi r3, r3, 56
786 ; CHECK-BE-NEXT: mtvsrd v2, r3
787 ; CHECK-BE-NEXT: mfvsrwz r3, f0
788 ; CHECK-BE-NEXT: sldi r3, r3, 56
789 ; CHECK-BE-NEXT: mtvsrd v3, r3
790 ; CHECK-BE-NEXT: addi r3, r1, -2
791 ; CHECK-BE-NEXT: vmrghb v2, v2, v3
792 ; CHECK-BE-NEXT: vsldoi v2, v2, v2, 10
793 ; CHECK-BE-NEXT: stxsihx v2, 0, r3
794 ; CHECK-BE-NEXT: lhz r3, -2(r1)
795 ; CHECK-BE-NEXT: blr
796 entry:
797 %0 = bitcast i64 %a.coerce to <2 x float>
798 %1 = fptosi <2 x float> %0 to <2 x i8>
799 %2 = bitcast <2 x i8> %1 to i16
800 ret i16 %2
801 }
803 define i32 @test4elt_signed(<4 x float> %a) local_unnamed_addr #1 {
804 ; CHECK-P8-LABEL: test4elt_signed:
805 ; CHECK-P8: # %bb.0: # %entry
806 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
807 ; CHECK-P8-NEXT: xscvspdpn f1, v2
808 ; CHECK-P8-NEXT: xxswapd vs2, v2
809 ; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1
810 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
811 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
812 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
813 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
814 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
815 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
816 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
817 ; CHECK-P8-NEXT: mfvsrwz r3, f1
818 ; CHECK-P8-NEXT: mtvsrd f1, r3
819 ; CHECK-P8-NEXT: mfvsrwz r3, f0
820 ; CHECK-P8-NEXT: mfvsrwz r4, f2
821 ; CHECK-P8-NEXT: xxswapd v4, vs1
822 ; CHECK-P8-NEXT: mtvsrd f0, r3
823 ; CHECK-P8-NEXT: mfvsrwz r3, f3
824 ; CHECK-P8-NEXT: mtvsrd f2, r4
825 ; CHECK-P8-NEXT: xxswapd v2, vs0
826 ; CHECK-P8-NEXT: mtvsrd f3, r3
827 ; CHECK-P8-NEXT: xxswapd v3, vs2
828 ; CHECK-P8-NEXT: xxswapd v5, vs3
829 ; CHECK-P8-NEXT: vmrglb v2, v3, v2
830 ; CHECK-P8-NEXT: vmrglb v3, v4, v5
831 ; CHECK-P8-NEXT: vmrglh v2, v3, v2
832 ; CHECK-P8-NEXT: xxswapd vs0, v2
833 ; CHECK-P8-NEXT: mfvsrwz r3, f0
834 ; CHECK-P8-NEXT: blr
835 ;
836 ; CHECK-P9-LABEL: test4elt_signed:
837 ; CHECK-P9: # %bb.0: # %entry
838 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3
839 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
840 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
841 ; CHECK-P9-NEXT: mfvsrwz r3, f0
842 ; CHECK-P9-NEXT: mtvsrd f0, r3
843 ; CHECK-P9-NEXT: xxswapd v3, vs0
844 ; CHECK-P9-NEXT: xxswapd vs0, v2
845 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
846 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
847 ; CHECK-P9-NEXT: mfvsrwz r3, f0
848 ; CHECK-P9-NEXT: mtvsrd f0, r3
849 ; CHECK-P9-NEXT: xxswapd v4, vs0
850 ; CHECK-P9-NEXT: xscvspdpn f0, v2
851 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
852 ; CHECK-P9-NEXT: mfvsrwz r3, f0
853 ; CHECK-P9-NEXT: mtvsrd f0, r3
854 ; CHECK-P9-NEXT: vmrglb v3, v4, v3
855 ; CHECK-P9-NEXT: xxswapd v4, vs0
856 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 1
857 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
858 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
859 ; CHECK-P9-NEXT: mfvsrwz r3, f0
860 ; CHECK-P9-NEXT: mtvsrd f0, r3
861 ; CHECK-P9-NEXT: li r3, 0
862 ; CHECK-P9-NEXT: xxswapd v2, vs0
863 ; CHECK-P9-NEXT: vmrglb v2, v4, v2
864 ; CHECK-P9-NEXT: vmrglh v2, v2, v3
865 ; CHECK-P9-NEXT: vextuwrx r3, r3, v2
866 ; CHECK-P9-NEXT: blr
867 ;
868 ; CHECK-BE-LABEL: test4elt_signed:
869 ; CHECK-BE: # %bb.0: # %entry
870 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 3
871 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
872 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
873 ; CHECK-BE-NEXT: mfvsrwz r3, f0
874 ; CHECK-BE-NEXT: xxswapd vs0, v2
875 ; CHECK-BE-NEXT: sldi r3, r3, 56
876 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
877 ; CHECK-BE-NEXT: mtvsrd v3, r3
878 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
879 ; CHECK-BE-NEXT: mfvsrwz r3, f0
880 ; CHECK-BE-NEXT: xscvspdpn f0, v2
881 ; CHECK-BE-NEXT: sldi r3, r3, 56
882 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
883 ; CHECK-BE-NEXT: mtvsrd v4, r3
884 ; CHECK-BE-NEXT: vmrghb v3, v4, v3
885 ; CHECK-BE-NEXT: mfvsrwz r3, f0
886 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 1
887 ; CHECK-BE-NEXT: sldi r3, r3, 56
888 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
889 ; CHECK-BE-NEXT: mtvsrd v4, r3
890 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
891 ; CHECK-BE-NEXT: mfvsrwz r3, f0
892 ; CHECK-BE-NEXT: sldi r3, r3, 56
893 ; CHECK-BE-NEXT: mtvsrd v2, r3
894 ; CHECK-BE-NEXT: li r3, 0
895 ; CHECK-BE-NEXT: vmrghb v2, v4, v2
896 ; CHECK-BE-NEXT: vmrghh v2, v2, v3
897 ; CHECK-BE-NEXT: vextuwlx r3, r3, v2
898 ; CHECK-BE-NEXT: blr
899 entry:
900 %0 = fptosi <4 x float> %a to <4 x i8>
901 %1 = bitcast <4 x i8> %0 to i32
902 ret i32 %1
903 }
905 define i64 @test8elt_signed(<8 x float>* nocapture readonly) local_unnamed_addr #2 {
906 ; CHECK-P8-LABEL: test8elt_signed:
907 ; CHECK-P8: # %bb.0: # %entry
908 ; CHECK-P8-NEXT: lvx v2, 0, r3
909 ; CHECK-P8-NEXT: li r4, 16
910 ; CHECK-P8-NEXT: lvx v5, r3, r4
911 ; CHECK-P8-NEXT: xxswapd vs1, v2
912 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
913 ; CHECK-P8-NEXT: xxsldwi vs2, v5, v5, 3
914 ; CHECK-P8-NEXT: xscvspdpn f4, v5
915 ; CHECK-P8-NEXT: xxswapd vs3, v5
916 ; CHECK-P8-NEXT: xxsldwi vs5, v5, v5, 1
917 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
918 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
919 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
920 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
921 ; CHECK-P8-NEXT: xscvspdpn f5, vs5
922 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
923 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
924 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
925 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
926 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
927 ; CHECK-P8-NEXT: xscvdpsxws f5, f5
928 ; CHECK-P8-NEXT: mfvsrwz r4, f4
929 ; CHECK-P8-NEXT: mfvsrwz r6, f1
930 ; CHECK-P8-NEXT: mfvsrwz r5, f0
931 ; CHECK-P8-NEXT: mtvsrd f1, r6
932 ; CHECK-P8-NEXT: mtvsrd f0, r5
933 ; CHECK-P8-NEXT: xxswapd v4, vs1
934 ; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 1
935 ; CHECK-P8-NEXT: xxswapd v3, vs0
936 ; CHECK-P8-NEXT: xscvspdpn f0, v2
937 ; CHECK-P8-NEXT: mtvsrd f4, r4
938 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
939 ; CHECK-P8-NEXT: mfvsrwz r4, f2
940 ; CHECK-P8-NEXT: xxswapd v1, vs4
941 ; CHECK-P8-NEXT: vmrglb v2, v4, v3
942 ; CHECK-P8-NEXT: mtvsrd f2, r4
943 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
944 ; CHECK-P8-NEXT: mfvsrwz r4, f5
945 ; CHECK-P8-NEXT: xxswapd v5, vs2
946 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
947 ; CHECK-P8-NEXT: mfvsrwz r3, f0
948 ; CHECK-P8-NEXT: mtvsrd f0, r3
949 ; CHECK-P8-NEXT: mfvsrwz r3, f1
950 ; CHECK-P8-NEXT: xxswapd v3, vs0
951 ; CHECK-P8-NEXT: mtvsrd f1, r3
952 ; CHECK-P8-NEXT: mfvsrwz r3, f3
953 ; CHECK-P8-NEXT: mtvsrd f3, r4
954 ; CHECK-P8-NEXT: xxswapd v4, vs1
955 ; CHECK-P8-NEXT: mtvsrd f0, r3
956 ; CHECK-P8-NEXT: xxswapd v6, vs3
957 ; CHECK-P8-NEXT: xxswapd v0, vs0
958 ; CHECK-P8-NEXT: vmrglb v3, v3, v4
959 ; CHECK-P8-NEXT: vmrglb v4, v0, v5
960 ; CHECK-P8-NEXT: vmrglb v5, v1, v6
961 ; CHECK-P8-NEXT: vmrglh v2, v3, v2
962 ; CHECK-P8-NEXT: vmrglh v3, v5, v4
963 ; CHECK-P8-NEXT: vmrglw v2, v3, v2
964 ; CHECK-P8-NEXT: xxswapd vs0, v2
965 ; CHECK-P8-NEXT: mfvsrd r3, f0
966 ; CHECK-P8-NEXT: blr
967 ;
968 ; CHECK-P9-LABEL: test8elt_signed:
969 ; CHECK-P9: # %bb.0: # %entry
970 ; CHECK-P9-NEXT: lxv vs1, 0(r3)
971 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
972 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
973 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
974 ; CHECK-P9-NEXT: lxv vs0, 16(r3)
975 ; CHECK-P9-NEXT: mfvsrwz r3, f2
976 ; CHECK-P9-NEXT: mtvsrd f2, r3
977 ; CHECK-P9-NEXT: xxswapd v2, vs2
978 ; CHECK-P9-NEXT: xxswapd vs2, vs1
979 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
980 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
981 ; CHECK-P9-NEXT: mfvsrwz r3, f2
982 ; CHECK-P9-NEXT: mtvsrd f2, r3
983 ; CHECK-P9-NEXT: xxswapd v3, vs2
984 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
985 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
986 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
987 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
988 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
989 ; CHECK-P9-NEXT: mfvsrwz r3, f2
990 ; CHECK-P9-NEXT: mtvsrd f2, r3
991 ; CHECK-P9-NEXT: mfvsrwz r3, f1
992 ; CHECK-P9-NEXT: mtvsrd f1, r3
993 ; CHECK-P9-NEXT: xxswapd v4, vs1
994 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
995 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
996 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
997 ; CHECK-P9-NEXT: vmrglb v2, v3, v2
998 ; CHECK-P9-NEXT: xxswapd v3, vs2
999 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
1000 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
1001 ; CHECK-P9-NEXT: mfvsrwz r3, f1
1002 ; CHECK-P9-NEXT: mtvsrd f1, r3
1003 ; CHECK-P9-NEXT: xxswapd v3, vs1
1004 ; CHECK-P9-NEXT: xxswapd vs1, vs0
1005 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
1006 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1007 ; CHECK-P9-NEXT: mfvsrwz r3, f1
1008 ; CHECK-P9-NEXT: mtvsrd f1, r3
1009 ; CHECK-P9-NEXT: xxswapd v4, vs1
1010 ; CHECK-P9-NEXT: xscvspdpn f1, vs0
1011 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
1012 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
1013 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1014 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1015 ; CHECK-P9-NEXT: mfvsrwz r3, f1
1016 ; CHECK-P9-NEXT: mtvsrd f1, r3
1017 ; CHECK-P9-NEXT: mfvsrwz r3, f0
1018 ; CHECK-P9-NEXT: mtvsrd f0, r3
1019 ; CHECK-P9-NEXT: vmrglb v3, v4, v3
1020 ; CHECK-P9-NEXT: xxswapd v4, vs1
1021 ; CHECK-P9-NEXT: xxswapd v5, vs0
1022 ; CHECK-P9-NEXT: vmrglb v4, v4, v5
1023 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
1024 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
1025 ; CHECK-P9-NEXT: mfvsrld r3, v2
1026 ; CHECK-P9-NEXT: blr
1027 ;
1028 ; CHECK-BE-LABEL: test8elt_signed:
1029 ; CHECK-BE: # %bb.0: # %entry
1030 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
1031 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
1032 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1033 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1034 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
1035 ; CHECK-BE-NEXT: mfvsrwz r3, f2
1036 ; CHECK-BE-NEXT: xxswapd vs2, vs1
1037 ; CHECK-BE-NEXT: sldi r3, r3, 56
1038 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1039 ; CHECK-BE-NEXT: mtvsrd v2, r3
1040 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1041 ; CHECK-BE-NEXT: mfvsrwz r3, f2
1042 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
1043 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
1044 ; CHECK-BE-NEXT: sldi r3, r3, 56
1045 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1046 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1047 ; CHECK-BE-NEXT: mtvsrd v3, r3
1048 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1049 ; CHECK-BE-NEXT: vmrghb v2, v3, v2
1050 ; CHECK-BE-NEXT: mfvsrwz r3, f2
1051 ; CHECK-BE-NEXT: sldi r3, r3, 56
1052 ; CHECK-BE-NEXT: mtvsrd v3, r3
1053 ; CHECK-BE-NEXT: mfvsrwz r3, f1
1054 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3
1055 ; CHECK-BE-NEXT: sldi r3, r3, 56
1056 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1057 ; CHECK-BE-NEXT: mtvsrd v4, r3
1058 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1059 ; CHECK-BE-NEXT: mfvsrwz r3, f1
1060 ; CHECK-BE-NEXT: xxswapd vs1, vs0
1061 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1062 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1063 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
1064 ; CHECK-BE-NEXT: sldi r3, r3, 56
1065 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
1066 ; CHECK-BE-NEXT: mtvsrd v3, r3
1067 ; CHECK-BE-NEXT: mfvsrwz r3, f1
1068 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
1069 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
1070 ; CHECK-BE-NEXT: sldi r3, r3, 56
1071 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1072 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
1073 ; CHECK-BE-NEXT: mtvsrd v4, r3
1074 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1075 ; CHECK-BE-NEXT: vmrghb v3, v4, v3
1076 ; CHECK-BE-NEXT: mfvsrwz r3, f1
1077 ; CHECK-BE-NEXT: sldi r3, r3, 56
1078 ; CHECK-BE-NEXT: mtvsrd v4, r3
1079 ; CHECK-BE-NEXT: mfvsrwz r3, f0
1080 ; CHECK-BE-NEXT: sldi r3, r3, 56
1081 ; CHECK-BE-NEXT: mtvsrd v5, r3
1082 ; CHECK-BE-NEXT: vmrghb v4, v4, v5
1083 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
1084 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
1085 ; CHECK-BE-NEXT: mfvsrd r3, v2
1086 ; CHECK-BE-NEXT: blr
1087 entry:
1088 %a = load <8 x float>, <8 x float>* %0, align 32
1089 %1 = fptosi <8 x float> %a to <8 x i8>
1090 %2 = bitcast <8 x i8> %1 to i64
1091 ret i64 %2
1092 }
1094 define <16 x i8> @test16elt_signed(<16 x float>* nocapture readonly) local_unnamed_addr #3 {
1095 ; CHECK-P8-LABEL: test16elt_signed:
1096 ; CHECK-P8: # %bb.0: # %entry
1097 ; CHECK-P8-NEXT: lvx v2, 0, r3
1098 ; CHECK-P8-NEXT: li r4, 16
1099 ; CHECK-P8-NEXT: lvx v3, r3, r4
1100 ; CHECK-P8-NEXT: li r4, 32
1101 ; CHECK-P8-NEXT: xscvspdpn f2, v2
1102 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
1103 ; CHECK-P8-NEXT: xscvspdpn f4, v3
1104 ; CHECK-P8-NEXT: xxswapd vs1, v2
1105 ; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1
1106 ; CHECK-P8-NEXT: xxsldwi vs5, v3, v3, 3
1107 ; CHECK-P8-NEXT: lvx v2, r3, r4
1108 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
1109 ; CHECK-P8-NEXT: xxswapd vs6, v3
1110 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
1111 ; CHECK-P8-NEXT: xxsldwi vs7, v3, v3, 1
1112 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
1113 ; CHECK-P8-NEXT: xxsldwi vs8, v2, v2, 3
1114 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
1115 ; CHECK-P8-NEXT: xxswapd vs9, v2
1116 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
1117 ; CHECK-P8-NEXT: xscvspdpn f5, vs5
1118 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
1119 ; CHECK-P8-NEXT: xscvspdpn f6, vs6
1120 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
1121 ; CHECK-P8-NEXT: mfvsrwz r4, f2
1122 ; CHECK-P8-NEXT: xscvspdpn f7, vs7
1123 ; CHECK-P8-NEXT: mtvsrd f2, r4
1124 ; CHECK-P8-NEXT: mfvsrwz r4, f4
1125 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
1126 ; CHECK-P8-NEXT: xscvspdpn f8, vs8
1127 ; CHECK-P8-NEXT: mtvsrd f4, r4
1128 ; CHECK-P8-NEXT: mfvsrwz r4, f0
1129 ; CHECK-P8-NEXT: xscvdpsxws f0, f5
1130 ; CHECK-P8-NEXT: xxswapd v0, vs4
1131 ; CHECK-P8-NEXT: xscvspdpn f9, vs9
1132 ; CHECK-P8-NEXT: mtvsrd f5, r4
1133 ; CHECK-P8-NEXT: mfvsrwz r4, f1
1134 ; CHECK-P8-NEXT: xscvdpsxws f1, f6
1135 ; CHECK-P8-NEXT: xxswapd v3, vs5
1136 ; CHECK-P8-NEXT: mtvsrd f6, r4
1137 ; CHECK-P8-NEXT: mfvsrwz r4, f3
1138 ; CHECK-P8-NEXT: xscvdpsxws f3, f7
1139 ; CHECK-P8-NEXT: xxswapd v4, vs6
1140 ; CHECK-P8-NEXT: mtvsrd f7, r4
1141 ; CHECK-P8-NEXT: mfvsrwz r4, f0
1142 ; CHECK-P8-NEXT: xscvdpsxws f0, f8
1143 ; CHECK-P8-NEXT: xxswapd v5, vs7
1144 ; CHECK-P8-NEXT: mtvsrd f8, r4
1145 ; CHECK-P8-NEXT: mfvsrwz r4, f1
1146 ; CHECK-P8-NEXT: xscvdpsxws f1, f9
1147 ; CHECK-P8-NEXT: xxswapd v1, vs8
1148 ; CHECK-P8-NEXT: mtvsrd f9, r4
1149 ; CHECK-P8-NEXT: mfvsrwz r4, f3
1150 ; CHECK-P8-NEXT: vmrglb v3, v4, v3
1151 ; CHECK-P8-NEXT: xxswapd v4, vs2
1152 ; CHECK-P8-NEXT: mtvsrd f3, r4
1153 ; CHECK-P8-NEXT: xxswapd v6, vs9
1154 ; CHECK-P8-NEXT: mfvsrwz r4, f0
1155 ; CHECK-P8-NEXT: xscvspdpn f0, v2
1156 ; CHECK-P8-NEXT: xxswapd v7, vs3
1157 ; CHECK-P8-NEXT: mtvsrd f5, r4
1158 ; CHECK-P8-NEXT: mfvsrwz r4, f1
1159 ; CHECK-P8-NEXT: vmrglb v4, v4, v5
1160 ; CHECK-P8-NEXT: xxswapd v5, vs5
1161 ; CHECK-P8-NEXT: mtvsrd f1, r4
1162 ; CHECK-P8-NEXT: li r4, 48
1163 ; CHECK-P8-NEXT: lvx v9, r3, r4
1164 ; CHECK-P8-NEXT: vmrglb v1, v6, v1
1165 ; CHECK-P8-NEXT: xxswapd v8, vs1
1166 ; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 1
1167 ; CHECK-P8-NEXT: xxsldwi vs2, v9, v9, 3
1168 ; CHECK-P8-NEXT: xscvspdpn f4, v9
1169 ; CHECK-P8-NEXT: xxswapd vs3, v9
1170 ; CHECK-P8-NEXT: xxsldwi vs5, v9, v9, 1
1171 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
1172 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
1173 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
1174 ; CHECK-P8-NEXT: xscvspdpn f5, vs5
1175 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
1176 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
1177 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
1178 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
1179 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
1180 ; CHECK-P8-NEXT: xscvdpsxws f5, f5
1181 ; CHECK-P8-NEXT: mfvsrwz r3, f0
1182 ; CHECK-P8-NEXT: mfvsrwz r4, f4
1183 ; CHECK-P8-NEXT: mtvsrd f0, r3
1184 ; CHECK-P8-NEXT: mtvsrd f4, r4
1185 ; CHECK-P8-NEXT: mfvsrwz r3, f1
1186 ; CHECK-P8-NEXT: mfvsrwz r4, f2
1187 ; CHECK-P8-NEXT: xxswapd v9, vs4
1188 ; CHECK-P8-NEXT: mtvsrd f1, r3
1189 ; CHECK-P8-NEXT: mfvsrwz r3, f3
1190 ; CHECK-P8-NEXT: mtvsrd f2, r4
1191 ; CHECK-P8-NEXT: xxswapd v6, vs1
1192 ; CHECK-P8-NEXT: mfvsrwz r4, f5
1193 ; CHECK-P8-NEXT: vmrglb v2, v0, v7
1194 ; CHECK-P8-NEXT: xxswapd v0, vs0
1195 ; CHECK-P8-NEXT: mtvsrd f0, r3
1196 ; CHECK-P8-NEXT: xxswapd v7, vs2
1197 ; CHECK-P8-NEXT: mtvsrd f3, r4
1198 ; CHECK-P8-NEXT: vmrglb v5, v8, v5
1199 ; CHECK-P8-NEXT: xxswapd v8, vs0
1200 ; CHECK-P8-NEXT: xxswapd v10, vs3
1201 ; CHECK-P8-NEXT: vmrglb v0, v0, v6
1202 ; CHECK-P8-NEXT: vmrglh v3, v4, v3
1203 ; CHECK-P8-NEXT: vmrglb v6, v8, v7
1204 ; CHECK-P8-NEXT: vmrglb v7, v9, v10
1205 ; CHECK-P8-NEXT: vmrglh v2, v2, v1
1206 ; CHECK-P8-NEXT: vmrglh v4, v0, v5
1207 ; CHECK-P8-NEXT: vmrglh v5, v7, v6
1208 ; CHECK-P8-NEXT: vmrglw v2, v2, v3
1209 ; CHECK-P8-NEXT: vmrglw v3, v5, v4
1210 ; CHECK-P8-NEXT: xxmrgld v2, v3, v2
1211 ; CHECK-P8-NEXT: blr
1212 ;
1213 ; CHECK-P9-LABEL: test16elt_signed:
1214 ; CHECK-P9: # %bb.0: # %entry
1215 ; CHECK-P9-NEXT: lxv vs2, 0(r3)
1216 ; CHECK-P9-NEXT: xxsldwi vs3, vs2, vs2, 3
1217 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
1218 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1219 ; CHECK-P9-NEXT: lxv vs0, 48(r3)
1220 ; CHECK-P9-NEXT: lxv vs1, 32(r3)
1221 ; CHECK-P9-NEXT: lxv vs4, 16(r3)
1222 ; CHECK-P9-NEXT: mfvsrwz r3, f3
1223 ; CHECK-P9-NEXT: mtvsrd f3, r3
1224 ; CHECK-P9-NEXT: xxswapd v2, vs3
1225 ; CHECK-P9-NEXT: xxswapd vs3, vs2
1226 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
1227 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1228 ; CHECK-P9-NEXT: mfvsrwz r3, f3
1229 ; CHECK-P9-NEXT: mtvsrd f3, r3
1230 ; CHECK-P9-NEXT: xxswapd v3, vs3
1231 ; CHECK-P9-NEXT: xscvspdpn f3, vs2
1232 ; CHECK-P9-NEXT: xxsldwi vs2, vs2, vs2, 1
1233 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
1234 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1235 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1236 ; CHECK-P9-NEXT: mfvsrwz r3, f3
1237 ; CHECK-P9-NEXT: mtvsrd f3, r3
1238 ; CHECK-P9-NEXT: mfvsrwz r3, f2
1239 ; CHECK-P9-NEXT: mtvsrd f2, r3
1240 ; CHECK-P9-NEXT: xxswapd v4, vs2
1241 ; CHECK-P9-NEXT: xxsldwi vs2, vs4, vs4, 3
1242 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
1243 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1244 ; CHECK-P9-NEXT: vmrglb v2, v3, v2
1245 ; CHECK-P9-NEXT: xxswapd v3, vs3
1246 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
1247 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
1248 ; CHECK-P9-NEXT: mfvsrwz r3, f2
1249 ; CHECK-P9-NEXT: mtvsrd f2, r3
1250 ; CHECK-P9-NEXT: xxswapd v3, vs2
1251 ; CHECK-P9-NEXT: xxswapd vs2, vs4
1252 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
1253 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1254 ; CHECK-P9-NEXT: mfvsrwz r3, f2
1255 ; CHECK-P9-NEXT: mtvsrd f2, r3
1256 ; CHECK-P9-NEXT: xxswapd v4, vs2
1257 ; CHECK-P9-NEXT: xscvspdpn f2, vs4
1258 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1259 ; CHECK-P9-NEXT: mfvsrwz r3, f2
1260 ; CHECK-P9-NEXT: mtvsrd f2, r3
1261 ; CHECK-P9-NEXT: vmrglb v3, v4, v3
1262 ; CHECK-P9-NEXT: xxswapd v4, vs2
1263 ; CHECK-P9-NEXT: xxsldwi vs2, vs4, vs4, 1
1264 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
1265 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1266 ; CHECK-P9-NEXT: mfvsrwz r3, f2
1267 ; CHECK-P9-NEXT: mtvsrd f2, r3
1268 ; CHECK-P9-NEXT: xxswapd v5, vs2
1269 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
1270 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
1271 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1272 ; CHECK-P9-NEXT: vmrglb v4, v4, v5
1273 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
1274 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
1275 ; CHECK-P9-NEXT: mfvsrwz r3, f2
1276 ; CHECK-P9-NEXT: mtvsrd f2, r3
1277 ; CHECK-P9-NEXT: xxswapd v3, vs2
1278 ; CHECK-P9-NEXT: xxswapd vs2, vs1
1279 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
1280 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1281 ; CHECK-P9-NEXT: mfvsrwz r3, f2
1282 ; CHECK-P9-NEXT: mtvsrd f2, r3
1283 ; CHECK-P9-NEXT: xxswapd v4, vs2
1284 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
1285 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
1286 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
1287 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1288 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1289 ; CHECK-P9-NEXT: mfvsrwz r3, f2
1290 ; CHECK-P9-NEXT: mtvsrd f2, r3
1291 ; CHECK-P9-NEXT: mfvsrwz r3, f1
1292 ; CHECK-P9-NEXT: mtvsrd f1, r3
1293 ; CHECK-P9-NEXT: xxswapd v5, vs1
1294 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
1295 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
1296 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1297 ; CHECK-P9-NEXT: vmrglb v3, v4, v3
1298 ; CHECK-P9-NEXT: xxswapd v4, vs2
1299 ; CHECK-P9-NEXT: vmrglb v4, v4, v5
1300 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
1301 ; CHECK-P9-NEXT: mfvsrwz r3, f1
1302 ; CHECK-P9-NEXT: mtvsrd f1, r3
1303 ; CHECK-P9-NEXT: xxswapd v4, vs1
1304 ; CHECK-P9-NEXT: xxswapd vs1, vs0
1305 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
1306 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1307 ; CHECK-P9-NEXT: mfvsrwz r3, f1
1308 ; CHECK-P9-NEXT: mtvsrd f1, r3
1309 ; CHECK-P9-NEXT: xxswapd v5, vs1
1310 ; CHECK-P9-NEXT: xscvspdpn f1, vs0
1311 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
1312 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
1313 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1314 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1315 ; CHECK-P9-NEXT: mfvsrwz r3, f1
1316 ; CHECK-P9-NEXT: mtvsrd f1, r3
1317 ; CHECK-P9-NEXT: mfvsrwz r3, f0
1318 ; CHECK-P9-NEXT: mtvsrd f0, r3
1319 ; CHECK-P9-NEXT: vmrglb v4, v5, v4
1320 ; CHECK-P9-NEXT: xxswapd v5, vs1
1321 ; CHECK-P9-NEXT: xxswapd v0, vs0
1322 ; CHECK-P9-NEXT: vmrglb v5, v5, v0
1323 ; CHECK-P9-NEXT: vmrglh v4, v5, v4
1324 ; CHECK-P9-NEXT: vmrglw v3, v4, v3
1325 ; CHECK-P9-NEXT: xxmrgld v2, v3, v2
1326 ; CHECK-P9-NEXT: blr
1327 ;
1328 ; CHECK-BE-LABEL: test16elt_signed:
1329 ; CHECK-BE: # %bb.0: # %entry
1330 ; CHECK-BE-NEXT: lxv vs3, 48(r3)
1331 ; CHECK-BE-NEXT: xxsldwi vs4, vs3, vs3, 3
1332 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
1333 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
1334 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
1335 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
1336 ; CHECK-BE-NEXT: lxv vs2, 32(r3)
1337 ; CHECK-BE-NEXT: mfvsrwz r3, f4
1338 ; CHECK-BE-NEXT: xxswapd vs4, vs3
1339 ; CHECK-BE-NEXT: sldi r3, r3, 56
1340 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
1341 ; CHECK-BE-NEXT: mtvsrd v2, r3
1342 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
1343 ; CHECK-BE-NEXT: mfvsrwz r3, f4
1344 ; CHECK-BE-NEXT: xscvspdpn f4, vs3
1345 ; CHECK-BE-NEXT: xxsldwi vs3, vs3, vs3, 1
1346 ; CHECK-BE-NEXT: sldi r3, r3, 56
1347 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
1348 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
1349 ; CHECK-BE-NEXT: mtvsrd v3, r3
1350 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1351 ; CHECK-BE-NEXT: vmrghb v2, v3, v2
1352 ; CHECK-BE-NEXT: mfvsrwz r3, f4
1353 ; CHECK-BE-NEXT: sldi r3, r3, 56
1354 ; CHECK-BE-NEXT: mtvsrd v3, r3
1355 ; CHECK-BE-NEXT: mfvsrwz r3, f3
1356 ; CHECK-BE-NEXT: xxsldwi vs3, vs2, vs2, 3
1357 ; CHECK-BE-NEXT: sldi r3, r3, 56
1358 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
1359 ; CHECK-BE-NEXT: mtvsrd v4, r3
1360 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1361 ; CHECK-BE-NEXT: mfvsrwz r3, f3
1362 ; CHECK-BE-NEXT: xxswapd vs3, vs2
1363 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
1364 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1365 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
1366 ; CHECK-BE-NEXT: sldi r3, r3, 56
1367 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
1368 ; CHECK-BE-NEXT: mtvsrd v3, r3
1369 ; CHECK-BE-NEXT: mfvsrwz r3, f3
1370 ; CHECK-BE-NEXT: xscvspdpn f3, vs2
1371 ; CHECK-BE-NEXT: xxsldwi vs2, vs2, vs2, 1
1372 ; CHECK-BE-NEXT: sldi r3, r3, 56
1373 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1374 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1375 ; CHECK-BE-NEXT: mtvsrd v4, r3
1376 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1377 ; CHECK-BE-NEXT: vmrghb v3, v4, v3
1378 ; CHECK-BE-NEXT: mfvsrwz r3, f3
1379 ; CHECK-BE-NEXT: sldi r3, r3, 56
1380 ; CHECK-BE-NEXT: mtvsrd v4, r3
1381 ; CHECK-BE-NEXT: mfvsrwz r3, f2
1382 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
1383 ; CHECK-BE-NEXT: sldi r3, r3, 56
1384 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1385 ; CHECK-BE-NEXT: mtvsrd v5, r3
1386 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1387 ; CHECK-BE-NEXT: mfvsrwz r3, f2
1388 ; CHECK-BE-NEXT: xxswapd vs2, vs1
1389 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1390 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1391 ; CHECK-BE-NEXT: vmrghb v4, v4, v5
1392 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
1393 ; CHECK-BE-NEXT: sldi r3, r3, 56
1394 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
1395 ; CHECK-BE-NEXT: mtvsrd v3, r3
1396 ; CHECK-BE-NEXT: mfvsrwz r3, f2
1397 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
1398 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
1399 ; CHECK-BE-NEXT: sldi r3, r3, 56
1400 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1401 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1402 ; CHECK-BE-NEXT: mtvsrd v4, r3
1403 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1404 ; CHECK-BE-NEXT: vmrghb v3, v4, v3
1405 ; CHECK-BE-NEXT: mfvsrwz r3, f2
1406 ; CHECK-BE-NEXT: sldi r3, r3, 56
1407 ; CHECK-BE-NEXT: mtvsrd v4, r3
1408 ; CHECK-BE-NEXT: mfvsrwz r3, f1
1409 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3
1410 ; CHECK-BE-NEXT: sldi r3, r3, 56
1411 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1412 ; CHECK-BE-NEXT: mtvsrd v5, r3
1413 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1414 ; CHECK-BE-NEXT: mfvsrwz r3, f1
1415 ; CHECK-BE-NEXT: xxswapd vs1, vs0
1416 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1417 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1418 ; CHECK-BE-NEXT: vmrghb v4, v4, v5
1419 ; CHECK-BE-NEXT: sldi r3, r3, 56
1420 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
1421 ; CHECK-BE-NEXT: mtvsrd v4, r3
1422 ; CHECK-BE-NEXT: mfvsrwz r3, f1
1423 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
1424 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
1425 ; CHECK-BE-NEXT: sldi r3, r3, 56
1426 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1427 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
1428 ; CHECK-BE-NEXT: mtvsrd v5, r3
1429 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1430 ; CHECK-BE-NEXT: vmrghb v4, v5, v4
1431 ; CHECK-BE-NEXT: mfvsrwz r3, f1
1432 ; CHECK-BE-NEXT: sldi r3, r3, 56
1433 ; CHECK-BE-NEXT: mtvsrd v5, r3
1434 ; CHECK-BE-NEXT: mfvsrwz r3, f0
1435 ; CHECK-BE-NEXT: sldi r3, r3, 56
1436 ; CHECK-BE-NEXT: mtvsrd v0, r3
1437 ; CHECK-BE-NEXT: vmrghb v5, v5, v0
1438 ; CHECK-BE-NEXT: vmrghh v4, v5, v4
1439 ; CHECK-BE-NEXT: vmrghw v3, v4, v3
1440 ; CHECK-BE-NEXT: xxmrghd v2, v3, v2
1441 ; CHECK-BE-NEXT: blr
1442 entry:
1443 %a = load <16 x float>, <16 x float>* %0, align 64
1444 %1 = fptosi <16 x float> %a to <16 x i8>
1445 ret <16 x i8> %1
1446 }