1 # RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-low-overhead-loops %s --verify-machineinstrs -o - | FileCheck %s
3 # CHECK: name: non_loop
6 # CHECK: bb.1.not.preheader:
7 # CHECK: t2CMPri renamable $lr, 0, 14
10 # CHECK: bb.3.while.body:
11 # CHECK: t2CMPri $lr, 0, 14
12 # CHECK: tBcc %bb.3, 1
14 # CHECK: bb.4.while.end:
17 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
18 target triple = "thumbv8.1m.main"
20 define void @non_loop(i16* nocapture %a, i16* nocapture readonly %b, i32 %N) {
22 %cmp = icmp ugt i32 %N, 2
23 br i1 %cmp, label %not.preheader, label %while.body.preheader
25 not.preheader: ; preds = %entry
26 %test = call i1 @llvm.test.set.loop.iterations.i32(i32 %N)
27 br i1 %test, label %while.body.preheader, label %while.end
29 while.body.preheader: ; preds = %not.preheader, %entry
30 %scevgep = getelementptr i16, i16* %a, i32 -1
31 %scevgep3 = getelementptr i16, i16* %b, i32 -1
34 while.body: ; preds = %while.body, %while.body.preheader
35 %lsr.iv4 = phi i16* [ %scevgep3, %while.body.preheader ], [ %scevgep5, %while.body ]
36 %lsr.iv = phi i16* [ %scevgep, %while.body.preheader ], [ %scevgep1, %while.body ]
37 %count = phi i32 [ %count.next, %while.body ], [ %N, %while.body.preheader ]
38 %scevgep7 = getelementptr i16, i16* %lsr.iv, i32 1
39 %scevgep4 = getelementptr i16, i16* %lsr.iv4, i32 1
40 %load = load i16, i16* %scevgep4, align 2
41 store i16 %load, i16* %scevgep7, align 2
42 %count.next = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %count, i32 1)
43 %cmp1 = icmp ne i32 %count.next, 0
44 %scevgep1 = getelementptr i16, i16* %lsr.iv, i32 1
45 %scevgep5 = getelementptr i16, i16* %lsr.iv4, i32 1
46 br i1 %cmp1, label %while.body, label %while.end
48 while.end: ; preds = %while.body, %not.preheader
52 declare i1 @llvm.test.set.loop.iterations.i32(i32) #0
53 declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #0
54 declare void @llvm.stackprotector(i8*, i8**) #1
56 attributes #0 = { noduplicate nounwind }
57 attributes #1 = { nounwind }
63 exposesReturnsTwice: false
65 regBankSelected: false
68 tracksRegLiveness: true
72 - { reg: '$r0', virtual-reg: '' }
73 - { reg: '$r1', virtual-reg: '' }
74 - { reg: '$r2', virtual-reg: '' }
76 isFrameAddressTaken: false
77 isReturnAddressTaken: false
87 cvBytesOfCalleeSavedRegisters: 0
88 hasOpaqueSPAdjustment: false
90 hasMustTailInVarArgFunc: false
96 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
97 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
98 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
99 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
100 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
101 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
104 machineFunctionInfo: {}
107 successors: %bb.1(0x40000000), %bb.2(0x40000000)
108 liveins: $r0, $r1, $r2, $r7, $lr
110 frame-setup tPUSH 14, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp
111 frame-setup CFI_INSTRUCTION def_cfa_offset 8
112 frame-setup CFI_INSTRUCTION offset $lr, -4
113 frame-setup CFI_INSTRUCTION offset $r7, -8
114 $lr = tMOVr $r2, 14, $noreg
115 tCMPi8 killed $r2, 3, 14, $noreg, implicit-def $cpsr
116 tBcc %bb.2, 3, killed $cpsr
119 successors: %bb.2(0x40000000), %bb.4(0x40000000)
120 liveins: $lr, $r0, $r1
122 t2WhileLoopStart renamable $lr, %bb.4, implicit-def dead $cpsr
125 bb.2.while.body.preheader:
126 successors: %bb.3(0x80000000)
127 liveins: $lr, $r0, $r1
129 renamable $r1, dead $cpsr = tSUBi8 killed renamable $r1, 2, 14, $noreg
130 renamable $r0, dead $cpsr = tSUBi8 killed renamable $r0, 2, 14, $noreg
133 successors: %bb.3(0x7c000000), %bb.4(0x04000000)
134 liveins: $lr, $r0, $r1
136 renamable $r2, renamable $r1 = t2LDRH_PRE killed renamable $r1, 2, 14, $noreg :: (load 2 from %ir.scevgep4)
137 early-clobber renamable $r0 = t2STRH_PRE killed renamable $r2, killed renamable $r0, 2, 14, $noreg :: (store 2 into %ir.scevgep7)
138 renamable $lr = t2LoopDec killed renamable $lr, 1
139 t2LoopEnd renamable $lr, %bb.3, implicit-def dead $cpsr
143 tPOP_RET 14, $noreg, def $r7, def $pc