1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s
4 define arm_aapcs_vfpcc <16 x i8> @abs_v16i8(<16 x i8> %s1) {
5 ; CHECK-LABEL: abs_v16i8:
6 ; CHECK: @ %bb.0: @ %entry
7 ; CHECK-NEXT: vabs.s8 q0, q0
10 %0 = icmp slt <16 x i8> %s1, zeroinitializer
11 %1 = sub nsw <16 x i8> zeroinitializer, %s1
12 %2 = select <16 x i1> %0, <16 x i8> %1, <16 x i8> %s1
16 define arm_aapcs_vfpcc <8 x i16> @abs_v8i16(<8 x i16> %s1) {
17 ; CHECK-LABEL: abs_v8i16:
18 ; CHECK: @ %bb.0: @ %entry
19 ; CHECK-NEXT: vabs.s16 q0, q0
22 %0 = icmp slt <8 x i16> %s1, zeroinitializer
23 %1 = sub nsw <8 x i16> zeroinitializer, %s1
24 %2 = select <8 x i1> %0, <8 x i16> %1, <8 x i16> %s1
28 define arm_aapcs_vfpcc <4 x i32> @abs_v4i32(<4 x i32> %s1) {
29 ; CHECK-LABEL: abs_v4i32:
30 ; CHECK: @ %bb.0: @ %entry
31 ; CHECK-NEXT: vabs.s32 q0, q0
34 %0 = icmp slt <4 x i32> %s1, zeroinitializer
35 %1 = sub nsw <4 x i32> zeroinitializer, %s1
36 %2 = select <4 x i1> %0, <4 x i32> %1, <4 x i32> %s1
40 define arm_aapcs_vfpcc <2 x i64> @abs_v2i64(<2 x i64> %s1) {
41 ; CHECK-LABEL: abs_v2i64:
42 ; CHECK: @ %bb.0: @ %entry
43 ; CHECK-NEXT: .save {r7, lr}
44 ; CHECK-NEXT: push {r7, lr}
45 ; CHECK-NEXT: vmov q1, q0
46 ; CHECK-NEXT: mov.w r12, #0
47 ; CHECK-NEXT: vmov lr, s4
48 ; CHECK-NEXT: vmov r0, s5
49 ; CHECK-NEXT: rsbs.w r3, lr, #0
50 ; CHECK-NEXT: sbc.w r2, r12, r0
51 ; CHECK-NEXT: cmp r0, #0
52 ; CHECK-NEXT: cset r1, mi
53 ; CHECK-NEXT: ands r1, r1, #1
55 ; CHECK-NEXT: moveq r2, r0
56 ; CHECK-NEXT: moveq r3, lr
57 ; CHECK-NEXT: vmov lr, s6
58 ; CHECK-NEXT: vmov.32 q0[0], r3
59 ; CHECK-NEXT: vmov r0, s7
60 ; CHECK-NEXT: vmov.32 q0[1], r2
61 ; CHECK-NEXT: rsbs.w r2, lr, #0
62 ; CHECK-NEXT: sbc.w r3, r12, r0
63 ; CHECK-NEXT: cmp r0, #0
64 ; CHECK-NEXT: cset r1, mi
65 ; CHECK-NEXT: ands r1, r1, #1
67 ; CHECK-NEXT: moveq r2, lr
68 ; CHECK-NEXT: vmov.32 q0[2], r2
70 ; CHECK-NEXT: moveq r3, r0
71 ; CHECK-NEXT: vmov.32 q0[3], r3
72 ; CHECK-NEXT: pop {r7, pc}
74 %0 = icmp slt <2 x i64> %s1, zeroinitializer
75 %1 = sub nsw <2 x i64> zeroinitializer, %s1
76 %2 = select <2 x i1> %0, <2 x i64> %1, <2 x i64> %s1