[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / test / MC / Hexagon / align.s
blobe85534def21f24d2065a26e7d0116b2dacc1b10e
1 # RUN: llvm-mc -triple=hexagon -filetype=obj -mhvx %s | llvm-objdump -mhvx -d - | FileCheck %s
3 # Verify that the .align directive emits the proper insn packets.
5 { r1 = sub(#1, r1) }
6 # CHECK: 76414021 { r1 = sub(#1,r1)
7 # CHECK-NEXT: 7f004000 nop
8 # CHECK-NEXT: 7f004000 nop
9 # CHECK-NEXT: 7f00c000 nop }
11 .align 16
12 { r1 = sub(#1, r1)
13 r2 = sub(#1, r2) }
14 # CHECK: 76414021 { r1 = sub(#1,r1)
15 # CHECK-NEXT: 76424022 r2 = sub(#1,r2)
16 # CHECK-NEXT: 7f004000 nop
17 # CHECK-NEXT: 7f00c000 nop }
19 .p2align 5
20 { r1 = sub(#1, r1)
21 r2 = sub(#1, r2)
22 r3 = sub(#1, r3) }
23 # CHECK: 76434023 r3 = sub(#1,r3)
24 # CHECK-NEXT: 7f00c000 nop }
26 .align 16
27 { r1 = sub(#1, r1)
28 r2 = sub(#1, r2)
29 r3 = sub(#1, r3)
30 r4 = sub(#1, r4) }
32 # Don't pad packets that can't be padded e.g. solo insts
33 # CHECK: 9200c020 { r0 = vextract(v0,r0) }
34 r0 = vextract(v0, r0)
35 .align 128
36 # CHECK: 76414021 { r1 = sub(#1,r1)
37 # CHECK-NEXT: 7f00c000 nop }
38 { r1 = sub(#1, r1) }
40 #CHECK: { r1 = sub(#1,r1)
41 #CHECK: r2 = sub(#1,r2)
42 #CHECK: r3 = sub(#1,r3) }
43 .falign
44 .align 8
45 { r1 = sub(#1, r1)
46 r2 = sub(#1, r2)
47 r3 = sub(#1, r3) }
49 # CHECK: { immext(#0)
50 # CHECK: r0 = sub(##1,r0)
51 # CHECK: immext(#0)
52 # CHECK: r1 = sub(##1,r1) }
53 # CHECK: { nop
54 # CHECK: nop
55 # CHECK: nop }
56 # CHECK: { r0 = sub(#1,r0) }
57 { r0 = sub (##1, r0)
58 r1 = sub (##1, r1) }
59 .align 16
60 { r0 = sub (#1, r0) }