[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / test / MC / Hexagon / guest.s
bloba552afe916915c258839bf30abc9f0ed98833732
1 # RUN: llvm-mc -arch=hexagon -mcpu=hexagonv62 -filetype=obj %s | llvm-objdump -d - | FileCheck %s
3 r0=gpmucnt4
4 # CHECK: { r0 = gpmucnt4 }
5 r0=gpmucnt5
6 # CHECK: { r0 = gpmucnt5 }
7 r0=gpmucnt6
8 # CHECK: { r0 = gpmucnt6 }
9 r0=gpmucnt7
10 # CHECK: { r0 = gpmucnt7 }
11 r0=gpcyclelo
12 # CHECK: { r0 = gpcyclelo }
13 r0=gpcyclehi
14 # CHECK: { r0 = gpcyclehi }
15 r0=gpmucnt0
16 # CHECK: { r0 = gpmucnt0 }
17 r0=gpmucnt1
18 # CHECK: { r0 = gpmucnt1 }
19 r0=gpmucnt2
20 # CHECK: { r0 = gpmucnt2 }
21 r0=gpmucnt3
22 # CHECK: { r0 = gpmucnt3 }
23 r0=gelr
24 # CHECK: { r0 = gelr }
25 r0=gsr
26 # CHECK: { r0 = gsr }
27 r0=gosp
28 # CHECK: { r0 = gosp }
29 r0=gbadva
30 # CHECK: { r0 = gbadva }
32 r1:0=g1:0
33 # CHECK: { r1:0 = g1:0 }
34 r1:0=g3:2
35 # CHECK: { r1:0 = g3:2 }
36 r1:0=g17:16
37 # CHECK: { r1:0 = g17:16 }
38 r1:0=g19:18
39 # CHECK: { r1:0 = g19:18 }
40 r1:0=g25:24
41 # CHECK: { r1:0 = g25:24 }
42 r1:0=g27:26
43 # CHECK: { r1:0 = g27:26 }
44 r1:0=g29:28
45 # CHECK: { r1:0 = g29:28 }
48 if (!p1) callr r26
49 r17=g0
50 if (!p3) r26=or(r15,r9)
51 memb(r11+#-478)=r17.new
53 # CHECK: { r17 = gelr
54 # CHECK: if (!p1) callr r26
55 # CHECK: if (!p3) r26 = or(r15,r9)
56 # CHECK: memb(r11+#-478) = r17.new }
59 if (!p1) callr r26
60 r17=gpmucnt2
61 if (!p3) r26=or(r15,r9)
62 memb(r11+#-478)=r17.new
64 # CHECK: { r17 = gpmucnt2
65 # CHECK: if (!p1) callr r26
66 # CHECK: if (!p3) r26 = or(r15,r9)
67 # CHECK: memb(r11+#-478) = r17.new }