1 # RUN: llvm-mc -arch=hexagon -filetype=obj %s | llvm-objdump -d - | FileCheck %s
4 # In packets with two extensions assembler is not extending both instructions
7 //['D_DUMMY,C4_or_or,L4_ploadrbtnew_abs,S2_storerfgp']
9 if
(p3
) r23 = memb
(##2164335510)
10 memh
(##1696682668) = r28.h
12 # CHECK: { immext(#2164335488)
13 # CHECK: if (p3) r23 = memb(##2164335510)
14 # CHECK: immext(#1696682624)
15 # CHECK: memh(##1696682668) = r28.h }
17 //['D_DUMMY,C4_or_or,L4_ploadrbtnew_abs,S2_storerfgp']
19 if
(p3.new
) r23 = memb
(##2164335510)
20 p3
= or(p2
,or(p3
, p0
))
22 # CHECK: { p3 = or(p2,or(p3,p0))
23 # CHECK: immext(#2164335488)
24 # CHECK: if (p3.new) r23 = memb(##2164335510) }
27 # -------------------------- Non-extended cases:
28 # -------------------------- Use GP and non GP notation
31 # CHECK: { r2 = memb(gp+#4096) }
34 # CHECK: { r3 = memh(gp+#4096) }
36 r4 = memub
(gp+
#0x1000)
37 # CHECK: { r4 = memub(gp+#4096) }
39 r5 = memuh
(gp+
#0x1000)
40 # CHECK: { r5 = memuh(gp+#4096) }
43 # CHECK: { r6 = memw(gp+#4096) }
45 R1:0 = memd
(gp+
#0x1000)
46 # CHECK: { r1:0 = memd(gp+#4096) }
48 {R25 = #1; memb(gp+#0x1000) = R25.new}
50 # CHECK-NEXT: memb(gp+#4096) = r25.new }
52 {R26 = #1; memh(gp+#0x1000) = R26.new}
54 # CHECK-NEXT: memh(gp+#4096) = r26.new }
56 {R27 = #1; memw(gp+#0x1000) = R27.new}
58 # CHECK-NEXT: memw(gp+#4096) = r27.new }
60 memd
(gp+
#0x1000) = R1:0
61 # CHECK: { memd(gp+#4096) = r1:0 }
64 # CHECK: { memb(gp+#4096) = r2 }
66 memh
(gp+
#0x1000) = r3.h
67 # CHECK: { memh(gp+#4096) = r3.h }
70 # CHECK: { memh(gp+#4096) = r4 }
73 # CHECK: { memw(gp+#4096) = r5 }
75 # -------------------------- Extended cases:
76 # -------------------------- Use GP and non GP notation
78 R11:10 = memd
(##0x1000)
79 # CHECK: { immext(#4096)
80 # CHECK-NEXT: r11:10 = memd(##4096) }
83 # CHECK: { immext(#4096)
84 # CHECK-NEXT: r11 = memb(##4096) }
87 # CHECK: { immext(#4096)
88 # CHECK-NEXT: r12 = memh(##4096) }
91 # CHECK: { immext(#4096)
92 # CHECK-NEXT: r13 = memub(##4096) }
95 # CHECK: { immext(#4096)
96 # CHECK-NEXT: r14 = memuh(##4096) }
99 # CHECK: { immext(#4096)
100 # CHECK-NEXT: r15 = memw(##4096) }
102 {R22 = #1; memb(##0x1000) = R22.new}
104 # CHECK-NEXT: immext(#4096)
105 # CHECK-NEXT: memb(##4096) = r22.new }
107 {R23 = #1; memh(##0x1000) = R23.new}
109 # CHECK-NEXT: immext(#4096)
110 # CHECK-NEXT: memh(##4096) = r23.new }
112 {R24 = #1; memw(##0x1000) = R24.new}
114 # CHECK-NEXT: immext(#4096)
115 # CHECK-NEXT: memw(##4096) = r24.new }
117 memd
(##0x1000) = R17:16
118 # CHECK: { immext(#4096)
119 # CHECK-NEXT: memd(##4096) = r17:16 }
122 # CHECK: { immext(#4096)
123 # CHECK-NEXT: memb(##4096) = r18 }
125 memh
(##0x1000) = r19.h
126 # CHECK: { immext(#4096)
127 # CHECK-NEXT: memh(##4096) = r19.h }
130 # CHECK: { immext(#4096)
131 # CHECK-NEXT: memh(##4096) = r20 }
134 # CHECK: { immext(#4096)
135 # CHECK-NEXT: memw(##4096) = r21 }