[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / test / MC / RISCV / data-directives-valid.s
blobece7f096f16ee911c8d84c1ca621fc99b829159a
1 # RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
2 # RUN: | llvm-objdump -s - | FileCheck %s
3 # RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
4 # RUN: | llvm-objdump -s - | FileCheck %s
6 # Check that data directives supported by gas are also supported by LLVM MC.
7 # As there was some confusion about whether .half/.word/.dword imply
8 # alignment (see <https://github.com/riscv/riscv-asm-manual/issues/12>), we
9 # are sure to check this.
11 .data
13 # CHECK: Contents of section .data:
14 # CHECK-NEXT: 0000 deadbeef badcaf11 22334455 66778800
15 .byte 0xde
16 .half 0xbead
17 .word 0xafdcbaef
18 .dword 0x8877665544332211
19 .byte 0
21 # CHECK-NEXT: 0010 deadbeef badcaf11 22334455 66778800
22 .byte 0xde
23 .2byte 0xbead
24 .4byte 0xafdcbaef
25 .8byte 0x8877665544332211
26 .byte 0
28 # CHECK-NEXT: 0020 deadbeef badcaf11 22
29 .byte 0xde
30 .short 0xbead
31 .long 0xafdcbaef
32 .hword 0x2211