test/MC/RISCV/rv64-user-csr-names.s

   1 # RUN: llvm-mc %s -triple=riscv64 -riscv-no-aliases -show-encoding \
   2 # RUN:     | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
   3 # RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
   4 # RUN:     | llvm-objdump -d - \
   5 # RUN:     | FileCheck -check-prefix=CHECK-INST-ALIAS %s
   6
   7 # These user mode CSR register names are RV32 only, but RV64
   8 # can encode and disassemble these registers if given their value.
   9
  10 ##################################
  11 # User Counter and Timers
  12 ##################################
  13
  14 # cycleh
  15 # uimm12
  16 # CHECK-INST: csrrs t2, 3200, zero
  17 # CHECK-ENC:  encoding: [0xf3,0x23,0x00,0xc8]
  18 # CHECK-INST-ALIAS: csrr t2, 3200
  19 csrrs t2, 0xC80, zero
  20
  21 # timeh
  22 # uimm12
  23 # CHECK-INST: csrrs t2, 3201, zero
  24 # CHECK-ENC:  encoding: [0xf3,0x23,0x10,0xc8]
  25 # CHECK-INST-ALIAS: csrr t2, 3201
  26 csrrs t2, 0xC81, zero
  27
  28 # instreth
  29 # uimm12
  30 # CHECK-INST: csrrs t2, 3202, zero
  31 # CHECK-ENC:  encoding: [0xf3,0x23,0x20,0xc8]
  32 # CHECK-INST-ALIAS: csrr t2, 3202
  33 csrrs t2, 0xC82, zero
  34
  35 # hpmcounter3h
  36 # uimm12
  37 # CHECK-INST: csrrs t2, 3203, zero
  38 # CHECK-ENC:  encoding: [0xf3,0x23,0x30,0xc8]
  39 # CHECK-INST-ALIAS: csrr t2, 3203
  40 csrrs t2, 0xC83, zero
  41
  42 # hpmcounter4h
  43 # uimm12
  44 # CHECK-INST: csrrs t2, 3204, zero
  45 # CHECK-ENC:  encoding: [0xf3,0x23,0x40,0xc8]
  46 # CHECK-INST-ALIAS: csrr t2, 3204
  47 csrrs t2, 0xC84, zero
  48
  49 # hpmcounter5h
  50 # uimm12
  51 # CHECK-INST: csrrs t2, 3205, zero
  52 # CHECK-ENC:  encoding: [0xf3,0x23,0x50,0xc8]
  53 # CHECK-INST-ALIAS: csrr t2, 3205
  54 csrrs t2, 0xC85, zero
  55
  56 # hpmcounter6h
  57 # uimm12
  58 # CHECK-INST: csrrs t2, 3206, zero
  59 # CHECK-ENC:  encoding: [0xf3,0x23,0x60,0xc8]
  60 # CHECK-INST-ALIAS: csrr t2, 3206
  61 csrrs t2, 0xC86, zero
  62
  63 # hpmcounter7h
  64 # uimm12
  65 # CHECK-INST: csrrs t2, 3207, zero
  66 # CHECK-ENC:  encoding: [0xf3,0x23,0x70,0xc8]
  67 # CHECK-INST-ALIAS: csrr t2, 3207
  68 csrrs t2, 0xC87, zero
  69
  70 # hpmcounter8h
  71 # uimm12
  72 # CHECK-INST: csrrs t2, 3208, zero
  73 # CHECK-ENC:  encoding: [0xf3,0x23,0x80,0xc8]
  74 # CHECK-INST-ALIAS: csrr t2, 3208
  75 csrrs t2, 0xC88, zero
  76
  77 # hpmcounter9h
  78 # uimm12
  79 # CHECK-INST: csrrs t2, 3209, zero
  80 # CHECK-ENC:  encoding: [0xf3,0x23,0x90,0xc8]
  81 # CHECK-INST-ALIAS: csrr t2, 3209
  82 csrrs t2, 0xC89, zero
  83
  84 # hpmcounter10h
  85 # uimm12
  86 # CHECK-INST: csrrs t2, 3210, zero
  87 # CHECK-ENC:  encoding: [0xf3,0x23,0xa0,0xc8]
  88 # CHECK-INST-ALIAS: csrr t2, 3210
  89 csrrs t2, 0xC8A, zero
  90
  91 # hpmcounter11h
  92 # uimm12
  93 # CHECK-INST: csrrs t2, 3211, zero
  94 # CHECK-ENC:  encoding: [0xf3,0x23,0xb0,0xc8]
  95 # CHECK-INST-ALIAS: csrr t2, 3211
  96 csrrs t2, 0xC8B, zero
  97
  98 # hpmcounter12h
  99 # uimm12
 100 # CHECK-INST: csrrs t2, 3212, zero
 101 # CHECK-ENC:  encoding: [0xf3,0x23,0xc0,0xc8]
 102 # CHECK-INST-ALIAS: csrr t2, 3212
 103 csrrs t2, 0xC8C, zero
 104
 105 # hpmcounter13h
 106 # uimm12
 107 # CHECK-INST: csrrs t2, 3213, zero
 108 # CHECK-ENC:  encoding: [0xf3,0x23,0xd0,0xc8]
 109 # CHECK-INST-ALIAS: csrr t2, 3213
 110 csrrs t2, 0xC8D, zero
 111
 112 # hpmcounter14h
 113 # uimm12
 114 # CHECK-INST: csrrs t2, 3214, zero
 115 # CHECK-ENC:  encoding: [0xf3,0x23,0xe0,0xc8]
 116 # CHECK-INST-ALIAS: csrr t2, 3214
 117 csrrs t2, 0xC8E, zero
 118
 119 # hpmcounter15h
 120 # uimm12
 121 # CHECK-INST: csrrs t2, 3215, zero
 122 # CHECK-ENC:  encoding: [0xf3,0x23,0xf0,0xc8]
 123 # CHECK-INST-ALIAS: csrr t2, 3215
 124 csrrs t2, 0xC8F, zero
 125
 126 # hpmcounter16h
 127 # uimm12
 128 # CHECK-INST: csrrs t2, 3216, zero
 129 # CHECK-ENC:  encoding: [0xf3,0x23,0x00,0xc9]
 130 # CHECK-INST-ALIAS: csrr t2, 3216
 131 csrrs t2, 0xC90, zero
 132
 133 # hpmcounter17h
 134 # uimm12
 135 # CHECK-INST: csrrs t2, 3217, zero
 136 # CHECK-ENC:  encoding: [0xf3,0x23,0x10,0xc9]
 137 # CHECK-INST-ALIAS: csrr t2, 3217
 138 csrrs t2, 0xC91, zero
 139
 140 # hpmcounter18h
 141 # uimm12
 142 # CHECK-INST: csrrs t2, 3218, zero
 143 # CHECK-ENC:  encoding: [0xf3,0x23,0x20,0xc9]
 144 # CHECK-INST-ALIAS: csrr t2, 3218
 145 csrrs t2, 0xC92, zero
 146
 147 # hpmcounter19h
 148 # uimm12
 149 # CHECK-INST: csrrs t2, 3219, zero
 150 # CHECK-ENC:  encoding: [0xf3,0x23,0x30,0xc9]
 151 # CHECK-INST-ALIAS: csrr t2, 3219
 152 csrrs t2, 0xC93, zero
 153
 154 # hpmcounter20h
 155 # uimm12
 156 # CHECK-INST: csrrs t2, 3220, zero
 157 # CHECK-ENC:  encoding: [0xf3,0x23,0x40,0xc9]
 158 # CHECK-INST-ALIAS: csrr t2, 3220
 159 csrrs t2, 0xC94, zero
 160
 161 # hpmcounter21h
 162 # uimm12
 163 # CHECK-INST: csrrs t2, 3221, zero
 164 # CHECK-ENC:  encoding: [0xf3,0x23,0x50,0xc9]
 165 # CHECK-INST-ALIAS: csrr t2, 3221
 166 csrrs t2, 0xC95, zero
 167
 168 # hpmcounter22h
 169 # uimm12
 170 # CHECK-INST: csrrs t2, 3222, zero
 171 # CHECK-ENC:  encoding: [0xf3,0x23,0x60,0xc9]
 172 # CHECK-INST-ALIAS: csrr t2, 3222
 173 csrrs t2, 0xC96, zero
 174
 175 # hpmcounter23h
 176 # uimm12
 177 # CHECK-INST: csrrs t2, 3223, zero
 178 # CHECK-ENC:  encoding: [0xf3,0x23,0x70,0xc9]
 179 # CHECK-INST-ALIAS: csrr t2, 3223
 180 csrrs t2, 0xC97, zero
 181
 182 # hpmcounter24h
 183 # uimm12
 184 # CHECK-INST: csrrs t2, 3224, zero
 185 # CHECK-ENC:  encoding: [0xf3,0x23,0x80,0xc9]
 186 # CHECK-INST-ALIAS: csrr t2, 3224
 187 csrrs t2, 0xC98, zero
 188
 189 # hpmcounter25h
 190 # uimm12
 191 # CHECK-INST: csrrs t2, 3225, zero
 192 # CHECK-ENC:  encoding: [0xf3,0x23,0x90,0xc9]
 193 # CHECK-INST-ALIAS: csrr t2, 3225
 194 csrrs t2, 0xC99, zero
 195
 196 # hpmcounter26h
 197 # uimm12
 198 # CHECK-INST: csrrs t2, 3226, zero
 199 # CHECK-ENC:  encoding: [0xf3,0x23,0xa0,0xc9]
 200 # CHECK-INST-ALIAS: csrr t2, 3226
 201 csrrs t2, 0xC9A, zero
 202
 203 # hpmcounter27h
 204 # uimm12
 205 # CHECK-INST: csrrs t2, 3227, zero
 206 # CHECK-ENC:  encoding: [0xf3,0x23,0xb0,0xc9]
 207 # CHECK-INST-ALIAS: csrr t2, 3227
 208 csrrs t2, 0xC9B, zero
 209
 210 # hpmcounter28h
 211 # uimm12
 212 # CHECK-INST: csrrs t2, 3228, zero
 213 # CHECK-ENC:  encoding: [0xf3,0x23,0xc0,0xc9]
 214 # CHECK-INST-ALIAS: csrr t2, 3228
 215 csrrs t2, 0xC9C, zero
 216
 217 # hpmcounter29h
 218 # uimm12
 219 # CHECK-INST: csrrs t2, 3229, zero
 220 # CHECK-ENC:  encoding: [0xf3,0x23,0xd0,0xc9]
 221 # CHECK-INST-ALIAS: csrr t2, 3229
 222 csrrs t2, 0xC9D, zero
 223
 224 # hpmcounter30h
 225 # uimm12
 226 # CHECK-INST: csrrs t2, 3230, zero
 227 # CHECK-ENC:  encoding: [0xf3,0x23,0xe0,0xc9]
 228 # CHECK-INST-ALIAS: csrr t2, 3230
 229 csrrs t2, 0xC9E, zero
 230
 231 # hpmcounter31h
 232 # uimm12
 233 # CHECK-INST: csrrs t2, 3231, zero
 234 # CHECK-ENC:  encoding: [0xf3,0x23,0xf0,0xc9]
 235 # CHECK-INST-ALIAS: csrr t2, 3231
 236 csrrs t2, 0xC9F, zero