[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / test / MC / RISCV / rv64i-aliases-valid.s
blob551e46f85302e70afc329f273b029a9142254702
1 # RUN: llvm-mc %s -triple=riscv64 -riscv-no-aliases \
2 # RUN: | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-INST %s
3 # RUN: llvm-mc %s -triple=riscv64 \
4 # RUN: | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-ALIAS %s
5 # RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
6 # RUN: | llvm-objdump -M no-aliases -d - \
7 # RUN: | FileCheck -check-prefixes=CHECK-OBJ-NOALIAS,CHECK-EXPAND,CHECK-INST %s
8 # RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
9 # RUN: | llvm-objdump -d - \
10 # RUN: | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-ALIAS %s
12 # The following check prefixes are used in this test:
13 # CHECK-INST.....Match the canonical instr (tests alias to instr. mapping)
14 # CHECK-ALIAS....Match the alias (tests instr. to alias mapping)
15 # CHECK-EXPAND...Match canonical instr. unconditionally (tests alias expansion)
17 # TODO ld
18 # TODO sd
20 # CHECK-INST: addi a0, zero, 0
21 # CHECK-ALIAS: mv a0, zero
22 li x10, 0
23 # CHECK-EXPAND: addi a0, zero, 1
24 li x10, 1
25 # CHECK-EXPAND: addi a0, zero, -1
26 li x10, -1
27 # CHECK-EXPAND: addi a0, zero, 2047
28 li x10, 2047
29 # CHECK-EXPAND: addi a0, zero, -2047
30 li x10, -2047
31 # CHECK-EXPAND: lui a1, 1
32 # CHECK-EXPAND: addiw a1, a1, -2048
33 li x11, 2048
34 # CHECK-EXPAND: addi a1, zero, -2048
35 li x11, -2048
36 # CHECK-EXPAND: lui a1, 1
37 # CHECK-EXPAND: addiw a1, a1, -2047
38 li x11, 2049
39 # CHECK-EXPAND: lui a1, 1048575
40 # CHECK-EXPAND: addiw a1, a1, 2047
41 li x11, -2049
42 # CHECK-EXPAND: lui a1, 1
43 # CHECK-EXPAND: addiw a1, a1, -1
44 li x11, 4095
45 # CHECK-EXPAND: lui a1, 1048575
46 # CHECK-EXPAND: addiw a1, a1, 1
47 li x11, -4095
48 # CHECK-EXPAND: lui a2, 1
49 li x12, 4096
50 # CHECK-EXPAND: lui a2, 1048575
51 li x12, -4096
52 # CHECK-EXPAND: lui a2, 1
53 # CHECK-EXPAND: addiw a2, a2, 1
54 li x12, 4097
55 # CHECK-EXPAND: lui a2, 1048575
56 # CHECK-EXPAND: addiw a2, a2, -1
57 li x12, -4097
58 # CHECK-EXPAND: lui a2, 524288
59 # CHECK-EXPAND: addiw a2, a2, -1
60 li x12, 2147483647
61 # CHECK-EXPAND: lui a2, 524288
62 # CHECK-EXPAND: addiw a2, a2, 1
63 li x12, -2147483647
64 # CHECK-EXPAND: lui a2, 524288
65 li x12, -2147483648
66 # CHECK-EXPAND: lui a2, 524288
67 li x12, -0x80000000
69 # CHECK-EXPAND: addi a2, zero, 1
70 # CHECK-EXPAND: slli a2, a2, 31
71 li x12, 0x80000000
72 # CHECK-EXPAND: addi a2, zero, 1
73 # CHECK-EXPAND: slli a2, a2, 32
74 # CHECK-EXPAND: addi a2, a2, -1
75 li x12, 0xFFFFFFFF
77 # CHECK-EXPAND: addi t0, zero, 1
78 # CHECK-EXPAND: slli t0, t0, 32
79 li t0, 0x100000000
80 # CHECK-EXPAND: addi t1, zero, -1
81 # CHECK-EXPAND: slli t1, t1, 63
82 li t1, 0x8000000000000000
83 # CHECK-EXPAND: addi t1, zero, -1
84 # CHECK-EXPAND: slli t1, t1, 63
85 li t1, -0x8000000000000000
86 # CHECK-EXPAND: lui t2, 9321
87 # CHECK-EXPAND: addiw t2, t2, -1329
88 # CHECK-EXPAND: slli t2, t2, 35
89 li t2, 0x1234567800000000
90 # CHECK-EXPAND: addi t3, zero, 7
91 # CHECK-EXPAND: slli t3, t3, 36
92 # CHECK-EXPAND: addi t3, t3, 11
93 # CHECK-EXPAND: slli t3, t3, 24
94 # CHECK-EXPAND: addi t3, t3, 15
95 li t3, 0x700000000B00000F
96 # CHECK-EXPAND: lui t4, 583
97 # CHECK-EXPAND: addiw t4, t4, -1875
98 # CHECK-EXPAND: slli t4, t4, 14
99 # CHECK-EXPAND: addi t4, t4, -947
100 # CHECK-EXPAND: slli t4, t4, 12
101 # CHECK-EXPAND: addi t4, t4, 1511
102 # CHECK-EXPAND: slli t4, t4, 13
103 # CHECK-EXPAND: addi t4, t4, -272
104 li t4, 0x123456789abcdef0
105 # CHECK-EXPAND: addi t5, zero, -1
106 li t5, 0xFFFFFFFFFFFFFFFF
108 # CHECK-EXPAND: addi a0, zero, 1110
109 li a0, %lo(0x123456)
110 # CHECK-OBJ-NOALIAS: addi a0, zero, 0
111 # CHECK-OBJ: R_RISCV_PCREL_LO12
112 li a0, %pcrel_lo(0x123456)
114 # CHECK-OBJ-NOALIAS: addi a0, zero, 0
115 # CHECK-OBJ: R_RISCV_LO12
116 li a0, %lo(foo)
117 # CHECK-OBJ-NOALIAS: addi a0, zero, 0
118 # CHECK-OBJ: R_RISCV_PCREL_LO12
119 li a0, %pcrel_lo(foo)
121 .equ CONST, 0x123456
122 # CHECK-EXPAND: lui a0, 291
123 # CHECK-EXPAND: addiw a0, a0, 1110
124 li a0, CONST
126 .equ CONST, 0x654321
127 # CHECK-EXPAND: lui a0, 1620
128 # CHECK-EXPAND: addiw a0, a0, 801
129 li a0, CONST
131 # CHECK-INST: subw t6, zero, ra
132 # CHECK-ALIAS: negw t6, ra
133 negw x31, x1
134 # CHECK-INST: addiw t6, ra, 0
135 # CHECK-ALIAS: sext.w t6, ra
136 sext.w x31, x1
138 # The following aliases are accepted as input but the canonical form
139 # of the instruction will always be printed.
140 # CHECK-INST: addiw a2, a3, 4
141 # CHECK-ALIAS: addiw a2, a3, 4
142 addw a2,a3,4
144 # CHECK-INST: slliw a2, a3, 4
145 # CHECK-ALIAS: slliw a2, a3, 4
146 sllw a2,a3,4
148 # CHECK-INST: srliw a2, a3, 4
149 # CHECK-ALIAS: srliw a2, a3, 4
150 srlw a2,a3,4
152 # CHECK-INST: sraiw a2, a3, 4
153 # CHECK-ALIAS: sraiw a2, a3, 4
154 sraw a2,a3,4
156 # CHECK-EXPAND: lwu a0, 0(a1)
157 lwu x10, (x11)
158 # CHECK-EXPAND: ld a0, 0(a1)
159 ld x10, (x11)
160 # CHECK-EXPAND: sd a0, 0(a1)
161 sd x10, (x11)