[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / test / MC / RISCV / rv64i-valid.s
blob4642db5e5c32c640406f7243404e38c26f0ceac7
1 # RUN: llvm-mc %s -triple=riscv64 -riscv-no-aliases -show-encoding \
2 # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
3 # RUN: llvm-mc -filetype=obj -triple=riscv64 < %s \
4 # RUN: | llvm-objdump -M no-aliases -d -r - \
5 # RUN: | FileCheck -check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s
7 .equ CONST, 31
9 # CHECK-ASM-AND-OBJ: lwu zero, 4(ra)
10 # CHECK-ASM: encoding: [0x03,0xe0,0x40,0x00]
11 lwu x0, 4(x1)
12 # CHECK-ASM-AND-OBJ: lwu sp, 4(gp)
13 # CHECK-ASM: encoding: [0x03,0xe1,0x41,0x00]
14 lwu x2, +4(x3)
15 # CHECK-ASM-AND-OBJ: lwu tp, -2048(t0)
16 # CHECK-ASM: encoding: [0x03,0xe2,0x02,0x80]
17 lwu x4, -2048(x5)
18 # CHECK-ASM-AND-OBJ: lwu t1, -2048(t2)
19 # CHECK-ASM: encoding: [0x03,0xe3,0x03,0x80]
20 lwu x6, %lo(2048)(x7)
21 # CHECK-ASM-AND-OBJ: lwu s0, 2047(s1)
22 # CHECK-ASM: encoding: [0x03,0xe4,0xf4,0x7f]
23 lwu x8, 2047(x9)
25 # CHECK-ASM-AND-OBJ: ld a0, -2048(a1)
26 # CHECK-ASM: encoding: [0x03,0xb5,0x05,0x80]
27 ld x10, -2048(x11)
28 # CHECK-ASM-AND-OBJ: ld a2, -2048(a3)
29 # CHECK-ASM: encoding: [0x03,0xb6,0x06,0x80]
30 ld x12, %lo(2048)(x13)
31 # CHECK-ASM-AND-OBJ: ld a4, 2047(a5)
32 # CHECK-ASM: encoding: [0x03,0xb7,0xf7,0x7f]
33 ld x14, 2047(x15)
35 # CHECK-ASM-AND-OBJ: sd a6, -2048(a7)
36 # CHECK-ASM: encoding: [0x23,0xb0,0x08,0x81]
37 sd x16, -2048(x17)
38 # CHECK-ASM-AND-OBJ: sd s2, -2048(s3)
39 # CHECK-ASM: encoding: [0x23,0xb0,0x29,0x81]
40 sd x18, %lo(2048)(x19)
41 # CHECK-ASM-AND-OBJ: sd s4, 2047(s5)
42 # CHECK-ASM: encoding: [0xa3,0xbf,0x4a,0x7f]
43 sd x20, 2047(x21)
45 # CHECK-ASM-AND-OBJ: slli s6, s7, 45
46 # CHECK-ASM: encoding: [0x13,0x9b,0xdb,0x02]
47 slli x22, x23, 45
48 # CHECK-ASM-AND-OBJ: srli s8, s9, 0
49 # CHECK-ASM: encoding: [0x13,0xdc,0x0c,0x00]
50 srli x24, x25, 0
51 # CHECK-ASM-AND-OBJ: srai s10, s11, 31
52 # CHECK-ASM: encoding: [0x13,0xdd,0xfd,0x41]
53 srai x26, x27, 31
54 # CHECK-ASM-AND-OBJ: srai s10, s11, 31
55 # CHECK-ASM: encoding: [0x13,0xdd,0xfd,0x41]
56 srai x26, x27, CONST
58 # CHECK-ASM-AND-OBJ: addiw t3, t4, -2048
59 # CHECK-ASM: encoding: [0x1b,0x8e,0x0e,0x80]
60 addiw x28, x29, -2048
61 # CHECK-ASM-AND-OBJ: addiw t5, t6, 2047
62 # CHECK-ASM: encoding: [0x1b,0x8f,0xff,0x7f]
63 addiw x30, x31, 2047
65 # CHECK-ASM-AND-OBJ: slliw zero, ra, 0
66 # CHECK-ASM: encoding: [0x1b,0x90,0x00,0x00]
67 slliw zero, ra, 0
68 # CHECK-ASM-AND-OBJ: slliw sp, gp, 31
69 # CHECK-ASM: encoding: [0x1b,0x91,0xf1,0x01]
70 slliw sp, gp, 31
71 # CHECK-ASM-AND-OBJ: srliw tp, t0, 0
72 # CHECK-ASM: encoding: [0x1b,0xd2,0x02,0x00]
73 srliw tp, t0, 0
74 # CHECK-ASM-AND-OBJ: srliw t1, t2, 31
75 # CHECK-ASM: encoding: [0x1b,0xd3,0xf3,0x01]
76 srliw t1, t2, 31
77 # CHECK-ASM-AND-OBJ: sraiw s0, s1, 0
78 # CHECK-ASM: encoding: [0x1b,0xd4,0x04,0x40]
79 sraiw s0, s1, 0
80 # CHECK-ASM-AND-OBJ: sraiw a0, a1, 31
81 # CHECK-ASM: encoding: [0x1b,0xd5,0xf5,0x41]
82 sraiw a0, a1, 31
83 # CHECK-ASM-AND-OBJ: sraiw a0, a1, 31
84 # CHECK-ASM: encoding: [0x1b,0xd5,0xf5,0x41]
85 sraiw a0, a1, CONST
87 # CHECK-ASM-AND-OBJ: addw a2, a3, a4
88 # CHECK-ASM: encoding: [0x3b,0x86,0xe6,0x00]
89 addw a2, a3, a4
90 # CHECK-ASM-AND-OBJ: addw a5, a6, a7
91 # CHECK-ASM: encoding: [0xbb,0x07,0x18,0x01]
92 addw a5, a6, a7
93 # CHECK-ASM-AND-OBJ: subw s2, s3, s4
94 # CHECK-ASM: encoding: [0x3b,0x89,0x49,0x41]
95 subw s2, s3, s4
96 # CHECK-ASM-AND-OBJ: subw s5, s6, s7
97 # CHECK-ASM: encoding: [0xbb,0x0a,0x7b,0x41]
98 subw s5, s6, s7
99 # CHECK-ASM-AND-OBJ: sllw s8, s9, s10
100 # CHECK-ASM: encoding: [0x3b,0x9c,0xac,0x01]
101 sllw s8, s9, s10
102 # CHECK-ASM-AND-OBJ: srlw s11, t3, t4
103 # CHECK-ASM: encoding: [0xbb,0x5d,0xde,0x01]
104 srlw s11, t3, t4
105 # CHECK-ASM-AND-OBJ: sraw t5, t6, zero
106 # CHECK-ASM: encoding: [0x3b,0xdf,0x0f,0x40]
107 sraw t5, t6, zero