1 // RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
3 include "llvm/Target/Target.td"
5 def archInstrInfo : InstrInfo { }
8 let InstructionSet = archInstrInfo;
11 def Myi32 : Operand<i32> {
12 let DecoderMethod = "DecodeMyi32";
16 let OutOperandList = (outs), Size = 2 in {
18 def foo : Instruction {
19 let InOperandList = (ins i32imm:$factor);
23 let Inst{14-8} = factor{6-0}; // no offset
24 let AsmString = "foo $factor";
25 field bits<16> SoftFail = 0;
28 def bar : Instruction {
29 let InOperandList = (ins i32imm:$factor);
33 let Inst{15-8} = factor{10-3}; // offset by 3
34 let AsmString = "bar $factor";
35 field bits<16> SoftFail = 0;
38 def biz : Instruction {
39 let InOperandList = (ins i32imm:$factor);
43 let Inst{11-8,15-12} = factor{10-3}; // offset by 3, multipart
44 let AsmString = "biz $factor";
45 field bits<16> SoftFail = 0;
48 def baz : Instruction {
49 let InOperandList = (ins Myi32:$factor);
53 let Inst{15-8} = factor{11-4}; // offset by 4 + custom decode
54 let AsmString = "baz $factor";
55 field bits<16> SoftFail = 0;
60 // CHECK: tmp = fieldFromInstruction(insn, 8, 7);
61 // CHECK: tmp = fieldFromInstruction(insn, 8, 8) << 3;
62 // CHECK: tmp |= fieldFromInstruction(insn, 8, 4) << 7;
63 // CHECK: tmp |= fieldFromInstruction(insn, 12, 4) << 3;
64 // CHECK: tmp = fieldFromInstruction(insn, 8, 8) << 4;