1 // RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s -o - 2>%t
2 // RUN: FileCheck %s < %t
4 include "llvm/Target/Target.td"
6 def MyTargetISA : InstrInfo;
7 def MyTarget : Target { let InstructionSet = MyTargetISA; }
9 def R0 : Register<"r0"> { let Namespace = "MyTarget"; }
10 def GPR32 : RegisterClass<"MyTarget", [i32], 32, (add R0)>;
12 class I<dag OOps, dag IOps, list<dag> Pat>
14 let Namespace = "MyTarget";
15 let OutOperandList = OOps;
16 let InOperandList = IOps;
22 def A : I<(outs GPR32:$dst), (ins GPR32:$src1), []> {
26 def B : I<(outs GPR32:$dst), (ins GPR32:$src1), []> {
31 // CHECK: Decoding Conflict:
32 // CHECK: 00000000000000000000000000000000
33 // CHECK: ................................
34 // CHECK: A 00000000000000000000000000000000
35 // CHECK: B 00000000000000000000000000000000