1 // RUN: llvm-tblgen -gen-emitter -I %p/../../include %s | FileCheck %s --check-prefix=ENCODER
2 // RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s --check-prefix=DECODER
4 include "llvm/Target/Target.td"
6 def archInstrInfo : InstrInfo { }
9 let InstructionSet = archInstrInfo;
12 def Myi32 : Operand<i32> {
13 let DecoderMethod = "DecodeMyi32";
16 def ModeA : HwMode<"+a">;
17 def ModeB : HwMode<"+b">;
20 def fooTypeEncA : InstructionEncoding {
22 field bits<32> SoftFail = 0;
25 let Inst{7-0} = factor;
30 def fooTypeEncB : InstructionEncoding {
32 field bits<32> SoftFail = 0;
35 let Inst{15-8} = factor;
39 let OutOperandList = (outs) in {
40 def foo : Instruction {
41 let InOperandList = (ins i32imm:$factor);
42 let EncodingInfos = EncodingByHwMode<
43 [ModeA, ModeB], [fooTypeEncA,
46 let AsmString = "foo $factor";
49 def bar: Instruction {
50 let InOperandList = (ins i32imm:$factor);
55 let Inst{31-24} = factor;
57 let AsmString = "bar $factor";
60 def baz : Instruction {
61 let InOperandList = (ins i32imm:$factor);
63 let EncodingInfos = EncodingByHwMode<
64 [ModeB], [fooTypeEncA]
66 let AsmString = "foo $factor";
70 // DECODER-LABEL: DecoderTable_ModeA32[] =
71 // DECODER-DAG: Opcode: fooTypeEncA:foo
72 // DECODER-DAG: Opcode: bar
73 // DECODER-LABEL: DecoderTable_ModeB32[] =
74 // Note that the comment says fooTypeEncA but this is actually fooTypeEncB; plumbing
75 // the correct comment text through the decoder is nontrivial.
76 // DECODER-DAG: Opcode: fooTypeEncA:foo
77 // DECODER-DAG: Opcode: bar
79 // ENCODER-LABEL: static const uint64_t InstBits_ModeA[] = {
80 // ENCODER: UINT64_C(2), // bar
81 // ENCODER: UINT64_C(12), // foo
83 // ENCODER-LABEL: static const uint64_t InstBits_ModeB[] = {
84 // ENCODER: UINT64_C(2), // bar
85 // ENCODER: UINT64_C(3), // foo
87 // ENCODER: case ::foo: {
88 // ENCODER: switch (HwMode) {
89 // ENCODER: default: llvm_unreachable("Unhandled HwMode");