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[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git]
/
test
/
TableGen
/
SuperSubclassSameName.td
blob
643b380ca0055341d686f56ce5b768d50eaf0c91
1
// RUN: llvm-tblgen < %s
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// XFAIL: vg_leak
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// Test for template arguments that have the same name as superclass template
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// arguments.
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class Arg { int a; }
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def TheArg : Arg { let a = 1; }
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class Super<Arg F> {
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int X = F.a;
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}
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class Sub<Arg F> : Super<F>;
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def inst : Sub<TheArg>;
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class Super2<int F> {
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int X = F;
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}
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class Sub2<int F> : Super2<F>;