[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / test / TableGen / intrin-side-effects.td
blob7588855830fae27bedb77167690f8b86c8586097
1 // RUN: llvm-tblgen -gen-intrinsic-impl -I %p/../../include %s | FileCheck %s
3 // Get the minimum blurb necessary to process ...
4 include "llvm/CodeGen/ValueTypes.td"
5 include "llvm/CodeGen/SDNodeProperties.td"
7 class LLVMType<ValueType vt> {
8   ValueType VT = vt;
9   int isAny = 0;
12 def llvm_i32_ty        : LLVMType<i32>;
14 class IntrinsicProperty;
15 def IntrNoMem : IntrinsicProperty;
16 def IntrHasSideEffects : IntrinsicProperty;
19 class Intrinsic<list<LLVMType> ret_types,
20                 list<LLVMType> param_types = [],
21                 list<IntrinsicProperty> intr_properties = [],
22                 string name = "",
23                 list<SDNodeProperty> sd_properties = []> : SDPatternOperator {
24   string LLVMName = name;
25   string TargetPrefix = "";
26   list<LLVMType> RetTypes = ret_types;
27   list<LLVMType> ParamTypes = param_types;
28   list<IntrinsicProperty> IntrProperties = intr_properties;
29   let Properties = sd_properties;
31   bit isTarget = 0;
34 // ... this intrinsic.
35 def int_random_gen   : Intrinsic<[llvm_i32_ty], [], [IntrNoMem, IntrHasSideEffects]>;
37 // CHECK: 1, // llvm.random.gen
38 // CHECK: case 1:
39 // CHECK-NEXT: Atts[] = {Attribute::NoUnwind}