[MIParser] Set RegClassOrRegBank during instruction parsing

[llvm-complete.git] / test / ThinLTO / X86 / Inputs / cache-typeid-resolutions1.ll

target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@vt1 = constant i32 0, !type !0

!0 = !{i32 0, !"typeid1"}